STMicroelectronics EVAL BOARD FOR L6563 EVL6563H-250W EVL6563H-250W Data Sheet

Product codes
EVL6563H-250W
Page of 49
Application information
L6563H
26/49
Doc ID 16047 Rev 3
Figure 39.
Voltage feedforward: squarer-divider (1/V
2
) block diagram and transfer characteristic 
In this way a change of the line voltage causes an inversely proportional change of the half 
sine amplitude at the output of the multiplier (if the line voltage doubles the amplitude of the 
multiplier output is halved and vice versa) so that the current reference is adapted to the new 
operating conditions with (ideally) no need for invoking the slow dynamics of the error 
amplifier. Additionally, the loop gain is constant throughout the input voltage range, which 
improves significantly dynamic behavior at low line and simplifies loop design.
Actually, deriving a voltage proportional to the RMS line voltage implies a form of integration, 
which has its own time constant. If it is too small the voltage generated is affected by a 
considerable amount of ripple at twice the mains frequency that causes distortion of the 
current reference (resulting in high THD and poor PF); if it is too large there is a 
considerable delay in setting the right amount of feedforward, resulting in excessive 
overshoot and undershoot of the pre-regulator's output voltage in response to large line 
voltage changes. Clearly a trade-off was required.
The L6563H realizes a NEW voltage feed forward that, with a technique that makes use of 
just two external parts, strongly minimizes this time constant trade-off issue whichever 
voltage change occurs on the mains, both surges and drops. A capacitor C
FF
 and a resistor 
RFF, both connected from the pin VFF (#5) to ground, complete an internal peak-holding 
circuit that provides a DC voltage equal to the peak of the rectified sine wave applied on pin 
MULT (#3). In this way, in case of sudden line voltage rise, C
FF
 is rapidly charged through 
the low impedance of the internal diode; in case of line voltage drop, an internal “mains 
drop” detector enables a low impedance switch which suddenly discharges CFF avoiding 
long settling time before reaching the new voltage level. The discharge of CFF is stopped as 
its voltage equals the voltage on pin MULT or if the voltage on pin RUN (in case it is 
connected to VFF) falls below 0.88V, to prevent the “Brownout protection” function from 
being improperly activated (see “Power management/housekeeping functions” section). 
As a result of the VFF pin functionality, an acceptably low steady-state ripple and low current 
distortion can be achieved with a limited undershoot or overshoot on the pre-regulator's 
output.
!-V


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