STMicroelectronics L6225 DMOS Evaluation Board EVAL6225PD EVAL6225PD Data Sheet

Product codes
EVAL6225PD
Page of 20
3/20
L6225
THERMAL DATA
PIN CONNECTIONS (Top View)
(5)
The slug is internally connected to pins 1,10,11 and 20 (GND pins).
Symbol
Description
PowerDIP20
SO20
PowerSO20
Unit
R
th-j-pins
MaximumThermal Resistance Junction-Pins
13
15
-
°
C/W
R
th-j-case
Maximum Thermal Resistance Junction-Case
-
-
2
°
C/W
R
th-j-amb1
MaximumThermal Resistance Junction-Ambient 
1
(1)
Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6cm
2
 (with a thickness of 35µm).
41
52
-
°
C/W
R
th-j-amb1
Maximum Thermal Resistance Junction-Ambient 
2
(2)
Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm
2
 (with a thickness of 35µm).
-
-
36
°
C/W
R
th-j-amb1
MaximumThermal Resistance Junction-Ambient 
3
(3)
Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6cm
(with a thickness of 35µm), 16 via holes
and a ground layer.
-
-
16
°
C/W
R
th-j-amb2
Maximum Thermal Resistance Junction-Ambient 
4
(4)
Mounted on a multi-layer FR4 PCB without any heat sinking surface on the board.
57
78
63
°
C/W
PowerDIP20/SO20
PowerSO20 
(5)
GND
OUT1
A
SENSE
A
IN2
A
IN1
A
VCP
EN
A
OUT2
A
VS
A
VS
B
OUT2
B
VBOOT
IN2
B
EN
B
IN1
B
SENSE
B
OUT1
B
GND
10
8
9
7
6
5
4
3
2
13
14
15
16
17
19
18
20
12
1
11
GND
GND
D99IN1092A
GND
OUT1
B
SENSE
B
IN1
B
IN2
B
1
3
2
4
5
6
7
8
9
EN
B
VBOOT
OUT2
B
VS
B
GND
15
14
13
12
11
D99IN1093A
10
20
19
18
17
16
IN1
A
IN2
A
SENSE
A
OUT1
A
GND
GND
VS
A
OUT2
A
VCP
EN
A