Intel III Xeon 667 MHz 80526KZ667256 Data Sheet

Product codes
80526KZ667256
Page of 103
PENTIUM® III XEON™ PROCESSOR AT 600 MHz to 1  GHz with 256KB L2 Cache
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1. INTRODUCTION
The Pentium® III Xeon™ processor at 600 MHz+, like the Pentium® Pro, Pentium® II, Pentium® III, Pentium® II  Xeon™
and Pentium® III  Xeon™ processor’s, implements a Dynamic Execution micro-architecture, a unique combination of
multiple branch prediction, data flow analysis, and speculative execution. The Pentium III Xeon processor at 600 MHz+ is
available in a 256K cache size.
The Pentium® III Xeon™ processor improves upon previous generations of Intel 32-bit processors by adding Streaming
SIMD Extensions. The  Single Instruction Multiple Data (SIMD) extensions significantly accelerate performance of 3D
graphics. Besides 3D graphics improvements, the extensions also include additional integer and cacheability instructions
that improve other aspects of performance. In addition, the Pentium III Xeon processor at 600 MHz+ utilizes a variation of
the S.E.C. (Single Edge Contact) package technology first introduced on the Pentium II processor. The SEC packaging
technology allows the Pentium III Xeon processor at 600 MHz+ to implement the Dual Independent Bus Architecture and
has 256KB of level 2 cache. Level 2 cache is integrated in the processing unit and communication occurs at the full speed
of the processor core.
As with previous members of the Pentium III Xeon processor family, the Pentium III Xeon processor at 600 MHz+ features
built-in direct multiprocessing support. For systems with up to two processors, it is important to consider the additional
power burdens and signal integrity issues of supporting multiple loads on a high-speed bus. The Pentium III  Xeon
processor at 600 MHz+ supports both uni-processor and multiprocessor implementations with support for two processing
units on each local processor bus, or system bus.
The Pentium III Xeon processor at 600 MHz+ system bus operates using GTL+ signaling levels with a new type of buffer
utilizing active negation and multiple terminations. This new bus logic is called  Assisted Gunning Transistor Logic, or
AGTL+.  
The Pentium III  Xeon processor at 600  MHz+ uses the  S.E.C. cartridge package supported by the SC330
Connector (See Chapter 7 for the processor mechanical specifications.)
The Pentium III  Xeon processor at 600  MHz+ includes an  SMBus interface that allows access to several processor
features, including two memory components (referred to as the processor Information ROM and the Scratch EEPROM)
and a thermal sensor on the Pentium III Xeon processor at 600 MHz+  substrate.
The Pentium III Xeon processor at 600 MHz+ system bus definition uses the SC330.1 interface. The SC330.1 interface is
an electrical only enhancement to the SC330 interface that allows supporting a dual Pentium III  Xeon processor at 600
MHz+  system running at 133Mhz system bus. The SC330.1 specification adds the required flexibility to accommodate
control and monitoring signals for an OCVR (On Cartridge Voltage Regulator). The OCVR provides the necessary high
precision regulation used by Intel’s latest silicon technology. This document provides information regarding the design of a
system using the Pentium III Xeon processor at 600 MHz+  with the new SC330.1 interface.
Certain versions of  the Pentium III Xeon processor at 600 MHz+ are designed to be compatible with the existing VRM 8.3
Guidelines, allowing an easy transition for Flexible Mother Board designs. The 2.8V Pentium III  Xeon processor
(regardless of frequency) is designed for compatibility with the VRM 8.3 Guidelines. The 5/12V Pentium III  Xeon
processor adds flexibility to operate at either 5 Volts or 12 Volts. The new flexible motherboard specification that
incorporates SC330.1 uses the same form factor and pin definition of the existing SC330 processors, but adds signals to
control an OCVR and remote sensing capabilities. The SC330.1 enhancement is electrically and mechanically compatible
with existing baseboards.