Intel 4 620 JM80547PG0722MM Data Sheet

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Regulator solutions need to provide bulk capacitance with a low Effective Series Resistance (ESR) 
and keep a low interconnect resistance from the regulator to the socket. Bulk decoupling for the 
large current swings when the part is powering on, or entering/exiting low power states, must be 
provided by the voltage regulator solution (VR). In addition, a sufficient quality of low ESR 
ceramic capacitors are required in the socket cavity to ensure proper high frequency noise 
suppression. For more details on this topic, refer to the Voltage Regulator Down (VRD) 10.1 
Design Guide for Desktop LGA775 Socket. Contact your Intel representative for further details and 
documentation.

The Pentium 4 processor integrates signal termination on the die as well as incorporating high 
frequency decoupling capacitance on the processor package. Decoupling must also be provided by 
the system baseboard for proper GTL+ bus operation. Contact your Intel representative for further 
details and documentation.

BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the processor. 
As in previous generation processors, the Pentium 4 processor core frequency is a multiple of the 
BCLK[1:0] frequency. The processor bus ratio multiplier will be set at its default ratio during 
manufacturing. No user intervention is necessary; the processor will automatically run at the speed 
indicated on the package.

The Pentium 4 processor uses a differential clocking implementation. For more information on the 
Pentium 4 processor clocking, contact your Intel representative. 

1.

Individual processors operate only at or below the rated frequency.

2.

Listed frequencies are not necessarily committed production frequencies.

1/14

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3.73 GHz

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1/15

3 GHz

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1/16

3.20 GHz

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1/17

3.40 GHz

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1/18

3.60 GHz

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1/19

3.80 GHz

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