Intel 1.40 GHz RH80532NC017256 Data Sheet

298517-006 Datasheet 

59 

V1 V

IL20

  

0.4 

V 

20 

Note 

1 

V2 V

IH20

 1.6 

 

V 

20 

Note 

1 

V3 V

IN

 Absolute Voltage Range 

-0.5 2.4  V 

20 

Undershoot, Overshoot, Note 2 

V4 

PICCLK Rising Edge Ringback 

1.6   

V 

20 

Absolute Value, Note 3 

V5 

PICCLK Falling Edge Ringback   

0.4  V 

20 

Absolute Value, Note 3 

 

1.  The clock must rise/fall monotonically between V

IL20

 and V

IH20

. 

2.  These specifications apply only when PICCLK is running. See the DC specifications for when PICCLK is 

stopped. PICCLK may not be above V

IH20,max

 or below V

IL20,min

 for more than 50% of the clock cycle. 

3.  The rising and falling edge ringback voltage specified is the minimum (rising) or maximum (falling) absolute 

voltage the PICCLK signal can go to after passing the V

IH20

 (rising) or V

IL20

 (falling) voltage limits. 

V0012-01

V1

V2

V3

max

V4

V3

min

V5