Intel 850 MHz KC80526NY850128 Data Sheet
Product codes
KC80526NY850128
R
Mobile Intel® Celeron® Processor Specification Update
15
NO.
BA2
PA2
MA2
BB0
PB0
MB0
BC0
PC0
MC0
BD0
PD0
FBD
O
FPDO
FBA1
FPA1
FBB1
FPB1
Plans
ERRATA
M11
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
LBER may be corrupted after some
events
events
M12
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
BTMs may be corrupted during
simultaneous L1 cache line
replacement
simultaneous L1 cache line
replacement
M13
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
Near CALL to ESP creates
unexpected EIP address
unexpected EIP address
M14
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
No Fix
Memory type undefined for non-
memory operations
memory operations
M15
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
FP Data operand pointer may not be
zero after power on or Reset
zero after power on or Reset
M16
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
MOVD following zeroing instruction
can cause incorrect result
can cause incorrect result
M17
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
Premature execution of a load
operation prior to exception handler
invocation
operation prior to exception handler
invocation
M18
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
Read portion of RMW instruction
may execute twice
may execute twice
M19
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
MC2_STATUS MSR has model-
specific error code and machine
check architecture error code
reversed
specific error code and machine
check architecture error code
reversed
M20
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
MOV with debug register causes
debug exception
debug exception
M21
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
Upper four PAT entries not usable
with Mode B or Mode C paging
with Mode B or Mode C paging
M22
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
Data breakpoint exception in a
displacement relative near call may
corrupt EIP
displacement relative near call may
corrupt EIP
M23
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
RDMSR and WRMSR to invalid
MSR may not cause GP fault
MSR may not cause GP fault
M24
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
SYSENTER/SYSEXIT instructions
can implicitly load null segment
selector to SS and CS registers
can implicitly load null segment
selector to SS and CS registers
M25
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
PRELOAD followed by EXTEST
does not load boundary scan data
does not load boundary scan data
M26
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
INT 1 instruction handler execution
could generate a debug exception
could generate a debug exception
M27
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
Misaligned Locked access to APIC
space results in a hang
space results in a hang
M28
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
Processor may assert DRDY# on a
write with no data.
write with no data.
M29
X X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
NoFix
GP# Fault on WRMSR to
ROB_CR_BKUPTMPDR6
ROB_CR_BKUPTMPDR6