Intel U2500 LE80539UE0092M User Manual

Datasheet

39

NOTES:
1.

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2.

Crossing Voltage is defined as absolute voltage where rising edge of BCLK0 is equal to the falling edge of 
BCLK1. 

3.

Threshold Region is defined as a region entered about the crossing voltage in which the differential receiver 
switches. It includes input threshold hysteresis.

4.

For Vin between 0 V and V

IH

.

5.

Cpad includes die capacitance only. No package parasitics are included.

6.

ΔV

CROSS 

is defined as the total variation of all crossing voltages as defined in note 2.

NOTES:
1.

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

2.

V

IL

 

is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low 

value.

3.

V

IH

 is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high 

value.

4.

V

IH

 and V

OH

 may experience excursions above V

CCP

. However, input signal drivers must comply with the 

signal quality specifications.

5.

This is the pull-down driver resistance.

6.

GTLREF should be generated from V

CCP

 with a 1% tolerance resistor divider. Tolerance of resistor divider 

decides the tolerance of GTLREF. The V

CCP

 referred to in these specifications is the instantaneous V

CCP

.

7.

R

TT

 is the on-die termination resistance measured at V

OL

 of the AGTL+ output driver.

8.

Specified with on die R

TT 

and R

ON 

are turned off.

9.

Cpad includes die capacitance only. No package parasitics are included.

10.

This spec applies to all AGTL+ signals except for PREQ#. R

TT 

for PREQ# is between 1.5 kΩ to 6.0 kΩ.

V

IL

Input Low Voltage

0

V

V

IH

Input High Voltage

0.660

0.710

0.85

V

V

CROSS

Crossing Voltage

0.25

0.35

0.55

V

2

 ΔV

CROSS

Range of Crossing Points

0.14

V

6

V

TH

Threshold Region

V

CROSS

 -0.100

V

CROSS

+0.100

V

3

I

LI

Input Leakage Current

± 100

µA

4

Cpad

Pad Capacitance

0.95

1.2

1.45

pF

5

V

CCP

I/O Voltage

0.997

1.05

1.102

V

GTLREF

Reference Voltage

2/3 V

CCP

V

6

V

IH

Input High Voltage

GTLREF+0.1

V

CCP

+0.1

V

3,6

V

IL

Input Low Voltage

-0.1

0

GTLREF-0.1

V

2,4

V

OH

Output High Voltage

V

CCP

6

 R

TT

Termination Resistance

50

55

61

 

Ω

     7,10

R

ON

Buffer on Resistance

22.3

25.5 

28.7

Ω

5

I

LI

Input Leakage Current

± 100

µA

8

Cpad

Pad Capacitance

1.8

2.3

2.75

pF

9