Intel U2500 LE80539UE0092M User Manual

Product codes
LE80539UE0092M
Page of 91
Package Mechanical Specifications and Pin Information
50
Datasheet
BPM[2:1]#
BPM[3,0]#
Output
Input/
Output
BPM[3:0]# (Breakpoint Monitor) are breakpoint and performance 
monitor signals. They are outputs from the processor which indicate 
the status of breakpoints and programmable counters used for 
monitoring processor performance. BPM[3:0]# should connect the 
appropriate pins of all processor FSB agents.This includes debug or 
performance monitoring tools.
Please contact your Intel representative for more detailed 
information.
BPRI#
Input
BPRI# (Bus Priority Request) is used to arbitrate for ownership of 
the FSB. It must connect the appropriate pins of both FSB agents. 
Observing BPRI# active (as asserted by the priority agent) causes 
the other agent to stop issuing new requests, unless such requests 
are part of an ongoing locked operation. The priority agent keeps 
BPRI# asserted until all of its requests are completed, then releases 
the bus by deasserting BPRI#.
BR0#
Input/
Output
BR0# is used by the processor to request the bus. The arbitration is 
done between the processor (Symmetric Agent) and the Mobile 
Intel® 945 Express Chipset family (High Priority Agent). 
BSEL[2:0]
Output
BSEL[2:0] (Bus Select) are used to select the processor input clock 
frequency. 
 defines the possible combinations of the signals 
and the frequency associated with each combination. The required 
frequency is determined by the processor, chipset and clock 
synthesizer. All agents must operate at the same frequency. The 
processor operates at 667-MHz or 533-MHz system bus frequency 
(166-MHz or 133-MHz BCLK[1:0] frequency, respectively). 
COMP[3:0]
Analog
COMP[3:0] must be terminated on the system board using 
precision (1% tolerance) resistors. Please contact your Intel 
representative for more implementation details.
Table 17.
Signal Description  (Sheet 2 of 9)
Name
Type
Description