Intel 1.80 GHz RH80532NC033256 Data Sheet

298517-006 Datasheet 

3 

 

1.

 

Introduction .................................................................................................................................10

 

1.1

 

Overview........................................................................................................................10

 

1.2

 

State of the Data............................................................................................................11

 

1.3

 

Terminology ...................................................................................................................11

 

1.4

 

References ....................................................................................................................12

 

2.

 

Mobile Intel Celeron Processor Features ...................................................................................13

 

2.1

 

New Features in the Mobile Intel Celeron Processor ....................................................13

 

2.1.1

 

133-MHz PSB With AGTL Signaling ...................................................................13

 

2.1.2

 

256-K On-die Integrated L2 Cache .....................................................................13

 

2.1.3

 

Data Prefetch Logic.............................................................................................13

 

2.1.4

 

Differential Clocking.............................................................................................13

 

2.1.5

 

Signal Differences Between the Mobile Intel Celeron Processor (0.18 µ) (in 
BGA2 and Micro-PGA2 Packages) and the Mobile Intel Celeron Processor  

 

(0.13 µ) (in Micro-FCBGA and Micro-FCPGA Packages)...................................14

 

2.2

 

Power Management ......................................................................................................14

 

2.2.1

 

Clock Control Architecture...................................................................................14

 

2.2.2

 

Normal State........................................................................................................14

 

2.2.3

 

Auto Halt State ....................................................................................................14

 

2.2.4

 

Quick Start State .................................................................................................15

 

2.2.5

 

HALT/Grant Snoop State ....................................................................................16

 

2.2.6

 

Deep Sleep State ................................................................................................16

 

2.2.7

 

Operating System Implications of Low-power States..........................................17

 

2.3

 

AGTL Signals.................................................................................................................17

 

2.4

 

Mobile Intel Celeron Processor CPUID .........................................................................17

 

3.

 

Electrical Specifications..............................................................................................................19

 

3.1

 

Processor System Signals.............................................................................................19

 

3.1.1

 

Power Sequencing Requirements.......................................................................20

 

3.1.2

 

Test Access Port (TAP) Connection....................................................................20

 

3.1.3

 

Catastrophic Thermal Protection.........................................................................21

 

3.1.4

 

Unused Signals ...................................................................................................21

 

3.1.5

 

Signal State in Low-power States .......................................................................21

 

3.1.5.1

 

System Bus Signals ........................................................................21

 

3.1.5.2

 

CMOS and Open-drain Signals ......................................................21

 

3.1.5.3

 

Other Signals ..................................................................................22

 

3.2

 

Power Supply Requirements .........................................................................................22

 

3.2.1

 

Decoupling Guidelines ........................................................................................22

 

3.2.2

 

Voltage Planes ....................................................................................................22

 

3.2.3

 

Voltage Identification ...........................................................................................23

 

3.2.4

 

VTTPWRGD Signal Quality Specification ...........................................................24

 

3.2.4.1

 

Transition Region ............................................................................24

 

3.2.4.2

 

Transition Time ...............................................................................24

 

3.2.4.3

 

Noise ...............................................................................................25

 

3.3

 

System Bus Clock and Processor Clocking ..................................................................25

 

3.4

 

Maximum Ratings..........................................................................................................26

 

3.5

 

DC Specifications ..........................................................................................................26