Intel III Xeon 933 MHz 80526KB933256 Data Sheet

17

voltage clamp, with the exception of BCLK, PICCLK and PWRGOOD

. 

The DC specifications for these pins are listed in

Table 8 and Table 9

.

Unless otherwise noted, each specification applies to all Pentium® III Xeon™ processors at 600 MHz+.

Specifications are only valid while meeting specifications for case temperature, clock frequency and input voltages. Care
should be taken to read all notes associated with each parameter.

V

CC_CORE

V

CC_CORE

V

CC

 

V

CC

 

4.75

11.4

2.8

5.0

12.0

5.25

12.6

V

2,3,4

4,6,7,8

V

CC_CORE

Tolerance,
Static

Core voltage static tolerance at edge
fingers 

-0.085

0.085 V

6

V

CC_CORE

Tolerance,
Transient

Processor core voltage transient
tolerance at edge fingers

(2.8V Pentium III Xeon processor)

-0.130

0.130 V

6

V

TT

AGTL+ Bus Termination voltage

1.47

1.50

1.53

V

1.5V

±2%, 5

V

CC_SMB

SMBus supply voltage

3.135

3.3

3.465 V

3.3V
±5%, 9

V

CC_TAP

TAP supply voltage

2.375

2.50

2.625 V

2.5V
±5%, 9

1. 

Unless otherwise noted, all specifications in this table apply to all processor frequencies. “FMB” is a suggested design guideline for
flexible motherboard design. Failure to adhere to the FMB guidelines may impact system upgradeability.

2. 

VCC_CORE

 supplies the processor core. FMB refers to the range of set points for all Pentium III Xeon processors at 600 MHz+.

3. 

These voltages are targets only. A variable voltage source should exist on systems in the event that a different voltage is required.
See section  3.5 for more information. Pentium III Xeon processor at 600 MHz+ does not require a separate 

VCC_L2

 voltage.

4. 

Use the Typical Voltage specification along with the tolerance specifications to provide correct voltage regulation to the processor.

5. 

Vtt is 1.5 +/- 2%  (AC & DC) for Pentium III Xeon processor at 600 MHz+ when the measurement is bandwidth limited to 20MHz and
measured at the SC 330 connector pin on the back (solder tail) side of the baseboard. This parameter is measured at the processor
edge fingers. The SC330 connector is specified to have a pin self-inductance of 6.0 nH maximum, a pin-to-pin capacitance of 2 pF
(maximum at 1 MHz), and an average contact resistance over the 6 V

TT

 pins of 15 m ohms maximum Z.

6. 

These are the tolerance requirements, across a 20MHz bandwidth, at the processor edge fingers.  The requirements at the
processor edge fingers account for voltage drops (and impedance discontinuities) at the processor edge fingers and to the processor
core. Voltage  must return to within the static voltage specification within 100 us after the transient event. The SC330 connector is
specified to have a pin self-inductance of 6.0 nH maximum, a pin-to-pin capacitance of 2 pF (maximum at 1 MHz), and an average
contact resistance of 15m ohms maximum in order to function with the Intel specified voltage regulator module (VRM 8.3). Contact
Intel for testing details of these parameters. Not 100% tested. Specified by design characterization.

7. 

5/12V Pentium III Xeon processor version is to be operated by 5V or 12V.

8. 

5V and 12V are specified at 

±

5%. This parameter includes both static (noise & ripple) and transient tolerances at the edge fingers.

9. 

VCC_SMB must be connected to 3.3V power supply (even if the SMBus features are not used) in order for the Pentium III Xeon
processor at 600 MHz+ to function properly.