Intel ULV 733/733J LE80536UC0052M Data Sheet
Product codes
LE80536UC0052M
18
Intel
®
Pentium
®
M Processor Datasheet
Electrical Specifications
3.3.1
V
CC
Decoupling
Regulator solutions need to provide bulk capacitance with a low Effective Series Resistance (ESR)
and keep a low interconnect resistance from the regulator to the socket. Bulk decoupling for the
large current swings when the part is powering on, or entering/exiting low-power states, must be
provided by the voltage regulator solution. For more details on decoupling recommendations,
please refer to the platform design guides. It is strongly recommended that the layout and
decoupling recommendations in the design guides be followed.
and keep a low interconnect resistance from the regulator to the socket. Bulk decoupling for the
large current swings when the part is powering on, or entering/exiting low-power states, must be
provided by the voltage regulator solution. For more details on decoupling recommendations,
please refer to the platform design guides. It is strongly recommended that the layout and
decoupling recommendations in the design guides be followed.
3.3.2
System Bus AGTL+ Decoupling
Intel Pentium M processors integrate signal termination on the die as well as incorporate high
frequency decoupling capacitance on the processor package. Decoupling must also be provided by
the system motherboard for proper AGTL+ bus operation. For more information, refer to the
platform design guides.
frequency decoupling capacitance on the processor package. Decoupling must also be provided by
the system motherboard for proper AGTL+ bus operation. For more information, refer to the
platform design guides.
3.3.3
System Bus Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the system bus interface speed as well as the core frequency of the
processor. As in previous generation processors, the Intel Pentium M processor core frequency is a
multiple of the BCLK[1:0] frequency. In regards to processor clocking, the Intel Pentium M
processor uses a differential clocking implementation.
processor. As in previous generation processors, the Intel Pentium M processor core frequency is a
multiple of the BCLK[1:0] frequency. In regards to processor clocking, the Intel Pentium M
processor uses a differential clocking implementation.
3.4
Voltage Identification
The Intel Pentium M processor uses six voltage identification pins, VID[5:0], to support automatic
selection of power supply voltages. The VID pins for the Intel Pentium M processor are CMOS
outputs driven by the processor VID circuitry.
selection of power supply voltages. The VID pins for the Intel Pentium M processor are CMOS
outputs driven by the processor VID circuitry.
specifies the voltage level corresponding to
the state of VID[5:0]. A “1” in this refers to a high-voltage level and a “0” refers to low-voltage
level.
level.