Intel i5-2450M AV8062700995805 Data Sheet

PROCHOT# only as a backup in case of system cooling failure. Overall, the system

thermal design should allow the power delivery circuitry to operate within its

temperature specification even while the processor is operating at its TDP.

With a properly designed and characterized thermal solution, it is anticipated that

PROCHOT# will only be asserted for very short periods of time when running the most

power intensive applications. The processor performance impact due to these brief

periods of TCC activation is expected to be so minor that it would be immeasurable.

However, an under-designed thermal solution that is not able to prevent excessive

assertion of PROCHOT# in the anticipated ambient environment may:
•

Cause a noticeable performance loss.

•

Result in prolonged operation at or above the specified maximum junction

temperature and affect the long-term reliability of the processor.

•

May be incapable of cooling the processor even when the TCC is active

continuously (in extreme situations).

Depending on package power levels during package C-states, outbound PROCHOT#

may de-assert while the processor is idle as power is removed from the signal. Upon

wakeup, if the processor is still hot, the PROCHOT# will re-assert, although typically

package idle state residency should resolve any thermal issues. The PECI interface is

fully operational during all C-states and it is expected that the platform continues to

manage processor core and package thermals even during idle states by regularly

polling for thermal data over PECI.

Regardless of enabling the automatic or on-demand modes, in the event of a

catastrophic cooling failure, the package will automatically shut down when the silicon

has reached an elevated temperature that risks physical damage to the product. At

this point the THERMTRIP# signal will go active.

Critical Temperature detection is performed by monitoring the package temperature.

This feature is intended for graceful shutdown before the THERMTRIP# is activated.

However, the processor execution is not guaranteed between critical temperature and

THERMTRIP#. If the Adaptive Thermal Monitor is triggered and the temperature

remains high, a critical temperature status and sticky bit are latched in the

PACKAGE_THERM_STATUS MSR 1B1h and the condition also generates a thermal

interrupt, if enabled. For more details on the interrupt mechanism, refer to the Intel

64 and IA-32 Architectures Software Developer’s Manual.

The processor provides an auxiliary mechanism that allows system software to force

the processor to reduce its power consumption using clock modulation. This

mechanism is referred to as "On-Demand" mode and is distinct from Adaptive Thermal

Monitor and bi-directional PROCHOT#. The processor platforms must not rely on

software usage of this mechanism to limit the processor temperature. On-Demand

Mode can be accomplished using processor MSR or chipset I/O emulation. On-Demand

5th Generation Intel

®

 Core

™

 Processor Family, Intel

®

 Core

™

 M Processor Family, Mobile Intel

®

 Pentium

®

 Processor Family, and

Mobile Intel

®

 Celeron

®

 Processor Family

Datasheet – Volume 1 of 2

March 2015

70

Order No.: 330834-004v1