Intel D2500 DF8064101055400 Data Sheet
Product codes
DF8064101055400
22
Datasheet - Volume 1 of 2
NOTE:
RSVD_* numbering needs to be observed for BSDL testing purposes.
2.3
DMI - Direct Media Interface
RESET#
Reset: Asserting the RESET# signal resets the processor to a
known state and invalidates its internal caches without writing
back any of their contents.
For a power-on Reset, RESET# must stay active for at least two
For a power-on Reset, RESET# must stay active for at least two
milliseconds after VCC and BCLK have reached their proper
specifications.
On observing active RESET#, both FSB agents will de-assert
On observing active RESET#, both FSB agents will de-assert
their outputs within two clocks.
All processor straps must be valid within the specified setup
All processor straps must be valid within the specified setup
time before RESET# is de-asserted.
When RESET# is asserted by the system, the STPCLK#, SLP#,
When RESET# is asserted by the system, the STPCLK#, SLP#,
DPSLP#, and DPRSTP# pins must be de-asserted prior to
RESET# de-assertion.
I
CMOS
RSVD_*
Reserved. Must be left unconnected on the board. Intel does not
recommend a test point on the board for this ball.
NC
RSVD_TP_*
Reserved-test-point. A test point may be placed on the board for
this ball.
I/O
Table 2-10.DMI - Processor to Intel NM10 Express Chipset Serial Interface
Signal Name
Description Direction
Type
DMI_RXP[3:0]
DMI_RXN[3:0]
DMI_RXN[3:0]
DMI input from Intel NM10 Express Chipset: Direct
Media Interface receive differential pair.
I
DMI
DMI_TXP[3:0]
DMI_TXN[3:0]
DMI_TXN[3:0]
DMI output to Intel NM10 Express Chipset: Direct
Media Interface transmit differential pair.
O
DMI
DMI_RCOMP
Connects externally to a 7.5 kOhms pull-up to 1.5 V
(DMI_REF1P5)
This pin and the external resistor is used to set internal
This pin and the external resistor is used to set internal
bias level.
Package resistance must be less than 0.15 Ohms for
Package resistance must be less than 0.15 Ohms for
this Bump.
I
-
DMI_REF1P5
current reference for DMI. Connects to 1.5 V
I
-
Table 2-9. Reset and Miscellaneous Signal (Sheet 2 of 2)
Signal Name
Description
Direction
Type