Intel D2500 DF8064101055400 Data Sheet
Product codes
DF8064101055400
64
Datasheet - Volume 1 of 2
4.9.3
DC Specifications
Platform reference voltages at the top of
REF
measurements should be made with respect to the supply voltage.
4.9.3.1
Input Clock DC Specification
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies. These are pre-
silicon estimates and are subject to change.
2.
Crossing voltage defined as instantaneous voltage when rising edge of CLKN equalize CLKP. The
crossing point must meet the absolute and relative crossing point specification simultaneously.
4.9.3.2
DDR3/DDR3L DC Specifications
Table 4-33.Input Clocks (BCLK, HPL_CLKIN, DPL_REFCLKIN, EXP_CLKIN) Differential
Specification
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
V
IL
Input Low Voltage
-0.30
0
V
V
IH
Input High Voltage
1.15
V
V
CROSS
Absolute crossing voltage
0.3
0.550
V
2,3
dV
CROSS
Range of crossing points
0.14
V
C
IN
Input Capacitance
1.0
3.0
pF
Table 4-34.
DDR3/DDR3L
Signal Group DC Specifications (Sheet 1 of 2)
Symbol
Parameter
Min
Typ
Max
Units
Notes
V
IL
(DC)
Input Low Voltage
SM_VREF
- 100mV
V
1, 3
V
IH
(DC)
Input High Voltage
SM_VREF
+ 100mV
V
2, 3
V
OL
Output Low Voltage
(VDDQ / 2)*
(RON /
(RON+RVTT
(RON+RVTT
_TERM))
3
V
OH
Output High Voltage
VDDQ -
((VDDQ /
2)* (RON/
(RON+RVTT
2)* (RON/
(RON+RVTT
_TERM))
V
3
I
IL
Input Leakage
Current
40(DDR3)
35(DDR3L
35(DDR3L
)
µA
For all
DDR
Signals,
CMD, CTL,
CK, DQ,
DQS
R
ON
DDR3 Clock Buffer
strength
26
Ω