Intel 887 AV8062701085401 Data Sheet
Product codes
AV8062701085401
Core break events are handled the same way as in package C3 or C6 state.
Package C8 State
The processor enters C8 states when the core with the highest state is C8.
The package C8 state is similar to package C7 state; however, in addition, all
internally generated voltage rails are turned off and the input V
CC
is reduced to 1.15 V
to 1.3 V.
Package C9 State
The processor enters package C9 states when the core with the highest state is C9.
The package C9 state is similar to package C8 state; in addition, the input V
CC
is
changed to 0 V.
Package C10 State
The processor enters C10 states when the core with the highest state is C10.
The package C10 state is similar to the package C9 state; in addition, the VR12.6 is in
PS4 low-power state, which is near to shut off of the VR12.6.
Dynamic L3 Cache Sizing
When all cores request C7 or deeper C-state, internal heuristics dynamically flushes
the L3 cache. Once the cores enter a deep C-state, depending on their MWAIT sub-
state request, the L3 cache is either gradually flushed N-ways at a time or flushed all
at once. Upon the cores exiting to C0, the L3 cache is gradually expanded based on
internal heuristics.
Package C-States and Display Resolutions
Integrated graphics have their frame buffer located in system memory. When the
display is updated, graphics fetches display data from system memory. Different
screen resolutions and refresh rates have different memory latency requirements.
These requirements may limit the deepest Package C-state the processor may enter.
Other elements that may affect the deepest Package C-state available are the
following.
•
•
Display is on or off
•
Single or multiple displays
•
Native or non-native resolution
•
Video playback
•
Panel Self Refresh technology
Note:
Display resolution is not the only factor influencing the deepest Package C-state the
processor can get into. Device latencies, interrupt response latencies, core C-states
among other factors influence the final package C-state the processor can go into.
4.2.6
Power Management—Processor
5th Generation Intel
®
Core
™
Processor Family, Intel
®
Core
™
M Processor Family, Mobile Intel
®
Pentium
®
Processor Family, and
Mobile Intel
®
Celeron
®
Processor Family
March 2015
Datasheet – Volume 1 of 2
Order No.: 330834-004v1
53