Intel 997 AV8062701084801 Data Sheet

times are independent of processor frequency. A small amount of hysteresis has been

included to prevent excessive clock modulation when the processor temperature is

near its maximum operating temperature. Once the temperature has dropped below

the maximum operating temperature and the hysteresis timer has expired, the

Adaptive Thermal Monitor goes inactive and clock modulation ceases. Clock

modulation is automatically engaged as part of the Adaptive Thermal Monitor

activation when the frequency/voltage targets are at their minimum settings.

Processor performance will be decreased by the same amount as the duty cycle when

clock modulation is active. Snooping and interrupt processing are performed in the

normal manner while the Adaptive Thermal Monitor is active.

Each processor execution core has an on-die Digital Thermal Sensor (DTS) that

detects the core's instantaneous temperature. The DTS is the preferred method of

monitoring processor die temperature because:
•

It is located near the hottest portions of the die.

•

It can accurately track the die temperature and ensure that the Adaptive Thermal

Monitor is not excessively activated.

Temperature values from the DTS can be retrieved through:
•

A software interface using processor Model Specific Register (MSR).

•

 on page 31.

When temperature is retrieved by the processor MSR, it is the instantaneous

temperature of the given core. When temperature is retrieved using PECI, it is the

average of the highest DTS temperature in the package over a 256 ms time window.

Intel recommends using the PECI reported temperature for platform thermal control

that benefits from averaging, such as fan speed control. The average DTS

temperature may not be a good indicator of package Adaptive Thermal Monitor

activation or rapid increases in temperature that triggers the Out of Specification

status bit within the PACKAGE_THERM_STATUS MSR 1B1h and IA32_THERM_STATUS

MSR 19Ch.

Code execution is halted in C1 or deeper C-states. Package temperature can still be

monitored through PECI in lower C-states.

Unlike traditional thermal devices, the DTS outputs a temperature relative to the

maximum supported operating temperature of the processor (Tj

MAX

), regardless of

TCC activation offset. It is the responsibility of software to convert the relative

temperature to an absolute temperature. The absolute reference temperature is

readable in the TEMPERATURE_TARGET MSR 1A2h. The temperature returned by the

DTS is an implied negative integer indicating the relative offset from Tj

MAX

. The DTS

does not report temperatures greater than Tj

MAX

. The DTS-relative temperature

readout directly impacts the Adaptive Thermal Monitor trigger point. When a package

DTS indicates that it has reached the TCC activation (a reading of 0h, except when the

TCC activation offset is changed), the TCC will activate and indicate an Adaptive

Thermal Monitor event. A TCC activation will lower both IA core and graphics core

frequency, voltage, or both. Changes to the temperature can be detected using two

programmable thresholds located in the processor thermal MSRs. These thresholds

have the capability of generating interrupts using the core's local APIC. Refer to the

 64 and IA-32 Architectures Software Developer’s Manual for specific register

and programming details.

5th Generation Intel

®

 Core

™

 Processor Family, Intel

®

 Core

™

 M Processor Family, Mobile Intel

®

 Pentium

®

 Processor Family, and

Mobile Intel

®

 Celeron

®

 Processor Family

Datasheet – Volume 1 of 2

March 2015

68

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