Intel 997 AV8062701084801 Data Sheet

V

DDQ (DDR3L/DDR3L-RS)

Processor I/O supply

voltage for DDR3L/DDR3L-

RS

—

1.35

—

V

2, 3

V

DDQ (LPDDR3)

Processor I/O supply

voltage for LPDDR3

—

1.20

—

V

2, 3

TOL

DDQ

VDDQ Tolerance (AC+DC)

-5

—

5

%

2, 3

Icc

MAX_VDDQ (DDR3L/

DDR3L-RS)

Max Current for V

DDQ

 Rail

(DDR3L/DDR3L-RS)

—

—

1.4

A

1

Icc

MAX_VDDQ (LPDDR3)

Max Current for V

DDQ

 Rail

(LPDDR3)

—

—

1.1

A

1

Notes: 1. The current supplied to the DIMM modules is not included in this specification.

2. Includes AC and DC error, where the AC noise is bandwidth limited to under 20 MHz.
3. No requirement on the breakdown of AC versus DC noise.

Vcc

ST

Processor Vcc Sustain

supply voltage

- 5%

1.05

+ 5%

V

Icc

MAX_VccST

Maximum Current for

Vcc

ST

—

—

100

mA

1

Note: 1. The maximum Icc

MAX

 specification is preliminary and based on initial silicon measurements and is

subject to change.

V

IL

Input Low Voltage

—

V

DDQ

/2

0.43*V

DDQ

V

2, 4, 11,

14

V

IH

Input High Voltage

0.57*V

DDQ

V

DDQ

/2

—

V

3, 11,

14

V

IL

Input Low Voltage

(SM_DRAMPWROK)

—

—

0.15*V

DDQ

V

—

V

IH

Input High Voltage

(SM_DRAMPWROK)

0.45*V

DDQ

—

1.0

V

10, 12

R

ON_UP(DQ)

DDR3L/DDR3L-RS Data

Buffer pull-up

Resistance

20

26

32

Ω

5, 11

R

ON_DN(DQ)

DDR3L/DDR3L-RS Data

Buffer pull-down

Resistance

20

26

32

Ω

5, 11

R

ODT(DQ)

DDR3L/DDR3L-RS On-

die termination

equivalent resistance

for data signals

38

50

62

Ω

11

V

ODT(DC)

DDR3L/DDR3L-RS On-

die termination DC

working point (driver

set to receive mode)

0.45*V

DDQ

0.5*V

DDQ

0.55*V

DDQ

V

11

5th Generation Intel

®

 Core

™

 Processor Family, Intel

®

 Core

™

 M Processor Family, Mobile Intel

®

 Pentium

®

 Processor Family, and

Mobile Intel

®

 Celeron

®

 Processor Family

March 2015

Datasheet – Volume 1 of 2

Order No.: 330834-004v1

89