Intel 9550 CM8063101049807 Data Sheet

Product codes
CM8063101049807
Page of 172
Thermal Specifications
136
Intel
®
 Itanium
®
 Processor 9300 Series and 9500 Series Datasheet
A Corrected Machine Check Interrupt (CMCI) is issued when processor enters 
and exits SIM. 
If T>= T
PROCHOT
 the Intel® Itanium® Processor 9500 Series and the activity 
factor maximum limit is already reduced, then the thermal management 
system will assert PROCHOT_N and the processor will enter Single Issue Mode 
(SIM) and transition to the lowest P-state.
The Intel
®
 Itanium
®
 Processor 9300 Series and Intel
®
 Itanium
®
 Processor 
9500 Series will remain in this low power mode until the temperature 
decreases and drops below (TPROCHOT - THYSTERESIS). The processor will be 
in this low power mode for a minimum of 1 second and after 1 second will 
resume normal operation as soon as the temperature has decreased 
sufficiently.
c. If T>=T
THERMWARN
, then the processor will issue a fatal MCA and PROCHOT_N 
will remain asserted; the thermal management controller becomes non-
functional. 
The processor cannot recover except via cold reset. The processor 
will continue to throttle if T>=T
PROCHOT
 when it comes out of reset.
Data integrity is not guaranteed beyond T
THERMWARN
.
d. If T>= T
THERMTRIP
, then the thermal management system will assert 
THERMTRIP_N and halt processor clocks.
T
THERMTRIP
 is enforced to prevent physical damage to the processor.
Cold reset is required to recover.
5.1.2.2
Implementation
The Intel
®
 Itanium
®
 Processor 9300 Series and Intel
®
 Itanium
®
 Processor 9500 Series 
thermal management features are designed to operate independently of software, 
including the operating system. The thermal sensors are on the die of the processor 
and the frequency and voltage control resides completely on the processor. In order to 
reduce the processor power while throttling, some execution units on the processor are 
shut down, limiting the processor to executing only one instruction per cycle.
When the PROCHOT threshold is crossed and the processor enters low power mode, a 
CMCI is sent to the
 
OS and to the System Abstraction Layer (SAL). This interrupt is 
sent out when entering throttling (CMCI entry) and also when the processor is exiting 
the SIM phase (CMCI exit) to inform the system of the performance status. Note that 
the temperature could cool below the throttle trip point but exiting SIM is still subject to 
the minimum time of 1 second. Information on the CMCI interrupt can be found in the 
Intel
® 
Itanium
® 
 Processor Family Interrupt Architecture Guide.
There is a mechanism to bypass the PROCHOT setpoint. When it is bypassed, both the 
THERMALERT_N and THERMTRIP_N signals, as well as THERMWARN threshold, still 
operate as normal. There is also a mode that emulates PROCHOT setpoint for testing. 
The processor can be placed in this mode by a Processor Abstraction Layer (PAL) call. 
Another PAL call will return the processor to normal operation. These special modes are 
intended for debug purposes only.
5.1.3
Thermal Alert
THERMALERT_N is a programmable thermal alert signal which is part of the Intel Intel
®
 
Itanium
®
 Processor 9300 Series and Intel
®
 Itanium
®
 Processor 9500 Series’ thermal 
management system. THERMALERT_N is asserted when the measured temperature 
from the processor’s digital thermometer (DT) is equal to or exceeds 
QR_CSR_IPF_THERM_CONFIG.thermalert_assert_hot_thresh below PROCHOT. 
THERMALERT_N will deassert after the DT readout is below PROCHOT by the sum of the 
values in QR_CSR_IPF_THERM_CONFIG.thermalert_assert_hot_thresh and