Intel 9560 CM8063101049716 Data Sheet

Product codes
CM8063101049716
Page of 172
Introduction
20
Intel
®
 Itanium
®
 Processor 9300 Series and 9500 Series Datasheet
1.4
Processor Abstraction Layer
The Intel
®
 Itanium
®
 Processor 9300 Series and Intel
®
 Itanium
®
 Processor 9500 Series 
require implementation-specific Processor Abstraction Layer (PAL) firmware. PAL 
firmware supports processor initialization, error recovery, and other functionality. It 
provides a consistent interface to system firmware and operating systems across 
processor hardware implementations. The Intel
®
 Itanium
®
 Architecture Software 
Developer’s Manual, Volume 2: System Architecture, describes PAL. Platforms must 
provide access to the firmware address space and PAL at reset to allow the processors 
to initialize.
The System Abstraction Layer (SAL) firmware contains platform-specific firmware to 
initialize the platform, boot to an operating system, and provide runtime functionality. 
Further information about SAL is available in the Intel
® 
Itanium
® 
Processor Family 
System Abstraction Layer Specification.
1.5
Mixing Processors of Different Frequencies and 
Cache Sizes
All Intel
®
 Itanium
®
 Processor 9300 Series processors and Intel
®
 Itanium
®
 Processor 
9500 Series in the same system partition are required to have the same last level 
cache size and identical core frequency. Mixing processors of different core frequencies, 
cache sizes, and mixing Intel
®
 Itanium
®
 Processor 9300 Series with Intel
®
 Itanium
®
 
Processor 9500 Series is not supported and has not been validated by Intel. Operating 
system support for multiprocessing with mixed components should also be considered.
1.6
Terminology
In this document, “the processor” refers to the Intel
®
 Itanium
®
 Processor 9300 Series 
and/or Intel
®
 Itanium
®
 Processor 9500 Series, unless otherwise indicated.
An ‘_N’ notation after a signal name refers to an active low signal. This means that a 
signal is in the active state (based on the name of the signal) when driven to a low 
level. For example, when RESET_N is low, a processor reset has been requested. When 
NMI is high, a non-maskable interrupt has occurred. In the case of lines where the 
name does not imply an active state but describes part of a binary sequence (such as 
Memory patrolling
Supported
Supported
Memory migration
Supported
Supported
Support for mixing of x4 and x8 on the 
same DDR channel
Not Supported
Supported
Online/Offline CPU (OS assisted)
Supported
Supported
Online/Offline Memory (OS assisted)
Supported
Supported
Online/Offline I/O Hub
Supported
Supported
Thermal Design Power (TDP) SKUs
130W, 155W, 185W
130W and 170W
Notes:
1. OEM responsible for specifying platform-specific retraining interval.
2. Electrical isolation only, no physical add/remove supported. 
3. Assume spare is installed.
Description
Intel
®
 Itanium
®
 Processor 9300 
Series
Intel
®
 Itanium
®
 Processor 9500 
Series