Intel 9560 CM8063101049716 Data Sheet

Product codes
CM8063101049716
Page of 172
Intel
®
 Itanium
® 
Processor 9300 Series and 9500 Series Datasheet
23
Electrical Specifications
2
Electrical Specifications
This chapter describes the electrical specifications of the Intel
®
 Itanium
®
 Processor 
9300 Series and 9500 Series processors.
2.1
Intel
®
 QuickPath Interconnect and Intel
®
 
Scalable Memory Interconnect 
Differential Signaling
The links for Intel
®
 QuickPath Interconnect (Intel
®
 QPI) and Intel
®
 Scalable Memory 
Interconnect (Intel
®
 SMI) signals use differential signaling. The Intel
®
 SMI bus pins are 
referred to as FB-DIMM pins on the package. The termination voltage level for the 
processor for uni-directional serial differential links, each link consisting of a pair of 
opposite-polarity (D+, D-) signals, is V
SS
.
Termination resistors are provided on the processor silicon and are terminated to V
SS, 
thus eliminating the need to terminate the links on the system board for the Intel
®
 
QuickPath Interconnect and FB-DIMM signals.
When designing a system, Intel strongly recommends that design teams perform 
analog simulations of the Intel
®
 QuickPath Interconnect and FB-DIMM pins. Please 
refer to the latest available revision of the Intel
®
 Itanium
®
 Processor 9300 Series and 
Intel
®
 Itanium
®
 Processor 9500 Series Platform Design Guide. 
 illustrates the active on-die termination (ODT) of these differential signals. 
All the differential signals listed in 
 have ODT resistors. Also included in the 
table are the debug signals.
Figure 2-1. Active ODT for a Differential Link Example
T
X
R
X
R
TT
R
TT
R
TT
R
TT
Signal
Signal