Intel 9560 CM8063101049716 Data Sheet
Product codes
CM8063101049716
Intel
®
Itanium
®
Processor 9300 Series and 9500 Series Datasheet
9
Introduction
1
Introduction
1.1
Overview
The Intel
®
Itanium
®
Processor 9300 Series and Intel
®
Itanium
®
Processor 9500 Series
employ Explicitly Parallel Instruction Computing (EPIC) design concepts for a tighter
coupling between hardware and software. In this design style, the interface between
hardware and software is designed to enable the software to exploit all available
compile-time information, and efficiently deliver this information to the hardware. It
addresses several fundamental performance bottlenecks in modern computers, such as
memory latency, memory address disambiguation, and control flow dependencies. The
EPIC constructs provide powerful architectural semantics, and enable the software to
make global optimizations across a large scheduling scope, thereby exposing available
Instruction Level Parallelism (ILP) to the hardware. The hardware takes advantage of
this enhanced ILP, and provides abundant execution resources. Additionally, it focuses
on dynamic run-time optimizations to enable the compiled code schedule to flow at
high throughput. This strategy increases the synergy between hardware and software,
and leads to greater overall performance.
coupling between hardware and software. In this design style, the interface between
hardware and software is designed to enable the software to exploit all available
compile-time information, and efficiently deliver this information to the hardware. It
addresses several fundamental performance bottlenecks in modern computers, such as
memory latency, memory address disambiguation, and control flow dependencies. The
EPIC constructs provide powerful architectural semantics, and enable the software to
make global optimizations across a large scheduling scope, thereby exposing available
Instruction Level Parallelism (ILP) to the hardware. The hardware takes advantage of
this enhanced ILP, and provides abundant execution resources. Additionally, it focuses
on dynamic run-time optimizations to enable the compiled code schedule to flow at
high throughput. This strategy increases the synergy between hardware and software,
and leads to greater overall performance.
The Intel
®
Itanium
®
Processor 9300 Series and Intel
®
Itanium
®
Processor 9500 Series
system interface, with its 4 full width and 2 half width Intel
®
QuickPath Interconnects,
enables each processor to directly connect to other system components, thus can be
used as an effective building block for very large systems. The balanced core and
memory subsystem provide high performance for a wide range of applications ranging
from commercial workloads to high performance technical computing.
used as an effective building block for very large systems. The balanced core and
memory subsystem provide high performance for a wide range of applications ranging
from commercial workloads to high performance technical computing.
The Intel
®
Itanium
®
Processor 9300 Series and Intel
®
Itanium
®
Processor 9500 Series
are pin compatible and support a range of computing needs and configurations from a
2-way to large SMP servers (although OEM field upgrade methodologies vary). This
document provides the electrical, mechanical and thermal specifications that must be
met when using the Intel
2-way to large SMP servers (although OEM field upgrade methodologies vary). This
document provides the electrical, mechanical and thermal specifications that must be
met when using the Intel
®
Itanium
®
Processor 9300 Series and Intel
®
Itanium
®
Processor 9500 Series in your systems.