Intel Core 2 Extreme QX9300 BX80562QX9300 User Manual

Datasheet

3

Introduction ..............................................................................................................7
1.1

Terminology .......................................................................................................7

Low Power Features ................................................................................................ 11
2.1

Clock Control and Low Power States .................................................................... 11
2.1.1

Core Low Power State Descriptions ........................................................... 13
2.1.1.1

Core C0 State........................................................................... 13

Core C1/AutoHALT Powerdown State ........................................... 13

Normal State............................................................................ 14

Stop-Grant State ...................................................................... 15

Stop-Grant Snoop State............................................................. 15

Sleep State .............................................................................. 15

Deep Sleep State ...................................................................... 16

Enhanced Intel SpeedStep® Technology .............................................................. 17

Electrical Specifications ........................................................................................... 21
3.1

Power and Ground Pins ...................................................................................... 21

Decoupling Guidelines........................................................................................ 21
3.2.1

 

Decoupling...................................................................................... 21

FSB AGTL+ Decoupling ........................................................................... 21

FSB Clock (BCLK[1:0]) and Processor Clocking........................................... 21

Voltage Identification and Power Sequencing ........................................................ 22

Reserved and Unused Pins.................................................................................. 26

FSB Signal Groups............................................................................................. 27

CMOS Signals ................................................................................................... 29

Maximum Ratings.............................................................................................. 29

3.10 Processor DC Specifications ................................................................................ 30

Package Mechanical Specifications and Pin Information .......................................... 37
4.1

Thermal Specifications and Design Considerations .................................................. 67
5.1

Monitoring Die Temperature ............................................................................... 68
5.1.1

Thermal Diode ....................................................................................... 68