Intel Core 2 Extreme QX9300 BX80562QX9300 User Manual
Product codes
BX80562QX9300
Datasheet
31
Electrical Specifications
NOTES:
1.
1.
Each processor is programmed with a maximum valid voltage identification value (VID),
which is set at manufacturing and cannot be altered. Individual maximum VID values are
calibrated during manufacturing such that two processors at the same frequency may have
different settings within the VID range. Note that this differs from the VID employed by
the processor during a power management event (Intel Thermal Monitor 2, Enhanced Intel
SpeedStep Technology, or Enhanced Halt State).
which is set at manufacturing and cannot be altered. Individual maximum VID values are
calibrated during manufacturing such that two processors at the same frequency may have
different settings within the VID range. Note that this differs from the VID employed by
the processor during a power management event (Intel Thermal Monitor 2, Enhanced Intel
SpeedStep Technology, or Enhanced Halt State).
2.
The voltage specifications are assumed to be measured across V
CC_SENSE
and V
SS_SENSE
pins at socket with a 100-MHz bandwidth oscilloscope, 1.5-pF maximum probe
capacitance, and 1-MΩ minimum impedance. The maximum length of ground wire on the
probe should be less than 5 mm. Ensure external noise from the system is not coupled in
the scope probe.
capacitance, and 1-MΩ minimum impedance. The maximum length of ground wire on the
probe should be less than 5 mm. Ensure external noise from the system is not coupled in
the scope probe.
3.
Specified at 100°C T
J
.
4.
Specified at the nominal V
CC
.
5.
Measured at the bulk capacitors on the motherboard.
6.
V
CC,BOOT
tolerance shown in
and
7.
Based on simulations and averaged over the duration of any change in current. Specified
by design/characterization at nominal V
by design/characterization at nominal V
CC
. Not 100% tested.
8.
This is a power-up peak current specification, which is applicable when V
CCP
is high and
V
CC_CORE
is low.
9.
This is a steady-state I
CC
current specification, which is applicable when both V
CCP
and
V
CC_CORE
are high.
10.
Instantaneous current I
CC_CORE_INST
of 85 A has to be sustained for short time (t
INST
) of
35µs. Average current will be less than maximum specified I
CCDES
. VR OCP threshold
should be high enough to support current levels described herein.
dI
CC/
DT
V
CC
Power Supply Current Slew Rate
at Processor Package Pin
—
—
600
A/µs
5, 7
I
CCA
I
CC
for V
CCA
Supply
—
—
130
mA
I
CCP
I
CC
for V
CCP
Supply before V
CC
Stable
I
CC
for V
CCP
Supply after V
CC
Stable
—
—
4.5
2.5
2.5
A
A
A
8, 9
Table 7.
Voltage and Current Specifications for the Quad-Core Extreme Mobile
Processors (Sheet 2 of 2)
Symbol
Parameter
Min
Typ
Max
Unit
Notes
Table 8.
Voltage and Current Specifications for the Quad-Core Mobile Processors
(Sheet 1 of 2)
Symbol
Parameter
Min
Typ
Max
Unit
Notes
V
CCDAM
V
CC
in Intel Dynamic Acceleration
Technology Mode
0.90
—
1.30
V
1, 2
V
CCHFM
V
CC
at Highest Frequency Mode (HFM)
0.90
—
1.25
V
1, 2
V
CCLFM
V
CC
at Lowest Frequency Mode (LFM)
0.85
—
1.10
V
1, 2
V
CC,BOOT
Default V
CC
Voltage for Initial Power
Up
—
1.20
V
2, 5, 6
V
CCP
AGTL+ Termination Voltage
1.00
1.05
1.10
V
V
CCA
PLL Supply Voltage
1.425
1.5
1.575
V
V
CCDPRSLP
V
CC
at Deeper Sleep
0.65
—
0.85
V
1, 2
I
CCDES
I
CC
for Processors Recommended
Design Target
—
—
64
A
5, 10