Intel i5-4300Y CL8064701558601 Data Sheet

Product codes

CL8064701558601

2.0

Interfaces

System Memory Interface

•

Two channels of DDR3L/DDR3L-RS and LPDDR3 memory with Unbuffered Small

Outline Dual In-Line Memory Modules (SO-DIMM) with a maximum of one DIMM

per channel and memory down.

•

Single-channel and dual-channel memory organization modes

•

Data burst length of eight for all memory organization modes

•

DDR3L/DDR3L-RS I/O Voltage of 1.35V

•

64-bit wide channels

•

Non-ECC, Unbuffered DDR3L/DDR3L-RS SO-DIMMs and memory down

•

Theoretical maximum memory bandwidth of:
— 21.3 GB/s in dual-channel mode assuming DDR3L/DDR3L-RS/LPDDR3

1333 MT/s

— 25.6 GB/s in dual-channel mode assuming DDR3L/DDR3L-RS/LPDDR3

1600 MT/s

System Memory Technology Supported

The Integrated Memory Controller (IMC) supports DDR3L/DDR3L-RS and LPDDR3

protocols with two independent, 64-bit wide channels. It supports one unbuffered non-

ECC DDR3L/DDR3L-RS DIMM per channel; thus, allowing up to two device ranks per

channel.

Table 3.

Processor DIMM Support Summary by Product

Processors

TDP

Graphics

Configuration

DIMM Per

Channel

DDR3L /

DDR3L-RS

(MT/s)

LPDDR3

(MT/s)

U-Processor (Dual-Core)

28W

GT3

1 DPC

1333/1600

N/A

15W

GT3

1 DPC

1333/1600

GT2

1 DPC

1333/1600

GT1

1 DPC

1333/1600

Y-Processor (Dual-Core)

11.5W (6W

SDP / 4.5W

SDP)

GT1, GT2

1 DPC

1333/1600

Notes: 1. LPDDR3 support may vary between the processor SKUs.

2. DDR3L-RS is supported as a memory configuration. Actual validation checkout depends on parts

and vendor availability.

2.1

2.1.1

Interfaces—Processors

Mobile 4th Generation Intel

Core

™

Processor Family, Mobile Intel

Pentium

Processor Family, and Mobile Intel

Celeron

Processor Family

July 2014

Datasheet – Volume 1 of 2

Order No.: 329001-007