Intel i3-4020Y CL8064701512402 Data Sheet

The following are the general types of reserved (RSVD) signals and connection

guidelines:
•

RSVD – these signals should not be connected

•

RSVD_TP – these signals should be routed to a test point

•

RSVD_NCTF – these signals are non-critical to function and may be left un-

connected

Arbitrary connection of these signals to VCC, VDDQ, VSS, or to any other signal

(including each other) may result in component malfunction or incompatibility with

future processors. See 

 on page 72 for a pin listing of the processor

and the location of all reserved signals.

For reliable operation, always connect unused inputs or bi-directional signals to an

appropriate signal level. Unused active high inputs should be connected through a

resistor to ground (VSS). Unused outputs maybe left unconnected; however, this may

interfere with some Test Access Port (TAP) functions, complicate debug probing, and

prevent boundary scan testing. A resistor must be used when tying bi-directional

signals to power or ground. When tying any signal to power or ground, a resistor will

also allow for system testability.

Signals are grouped by buffer type and similar characteristics as listed in the following

table. The buffer type indicates which signaling technology and specifications apply to

the signals. All the differential signals and selected DDR3L/DDR3L-RS/LPDDR3 and

Control Sideband signals have On-Die Termination (ODT) resistors. Some signals do

not have ODT and need to be terminated on the board.

All Control Sideband Asynchronous signals are required to be asserted/de-asserted for

at least 10 BCLKs with maximum Trise/Tfall of 6 ns for the processor to recognize the

proper signal state. See the DC Specifications section and AC Specifications section.

Differential

DDR3L/DDR3L-RS/

LPDDR3 Output

SA_CKP[1:0], SA_CKN[1:0], SB_CKP[1:0], SB_CKN[1:0]

Single ended

DDR3L/DDR3L-RS/

LPDDR3 Output

DDR3L/DDR3L-RS Mode

LPDDR3 Mode

SA_BS2, SB_BS2

SA_CAA5, SB_CAA5

SA_BS1, SB_BS1

SA_CAB6, SB_CAB6

SA_BS0, SB_BS0

SA_CAB4, SB_CAB4

SA_WE#, SB_WE#

SA_CAB2, SB_CAB2

SA_RAS#, SB_RAS#

SA_CAB3, SB_CAB3

SA_CAS#, SB_CAS#

SA_CAB1, SB_CAB1

Mobile 4th Generation Intel

®

 Core

™

 Processor Family, Mobile Intel

®

 Pentium

®

 Processor Family, and Mobile Intel

®

 Celeron

®

Processor Family

July 2014

Datasheet – Volume 1 of 2

Order No.: 329001-007

87