Intel i7-4600U CL8064701477000 Data Sheet

The processor enters C8 states when the core with the highest state is C8.

The package C8 state is similar to package C7 state; however, in addition, all

internally generated voltage rails are turned off and the input V

CC

 is reduced to 1.15 V

to 1.3 V.

The processor enters package C9 states when the core with the highest state is C9.

The package C9 state is similar to package C8 state; in addition, the input V

CC

 is

changed to 0 V.

The processor enters C10 states when the core with the highest state is C10.

The package C10 state is similar to the package C9 state; in addition, the VR12.6 is in

PS4 low-power state, which is near to shut off of the VR12.6.

When all cores request C7 or deeper C-state, internal heuristics is dynamically flushes

the L3 cache. Once the cores enter a deep C-state, depending on their MWAIT

substate request, the L3 cache is either gradually flushed N-ways at a time or flushed

all at once. Upon the cores exiting to C0, the L3 cache is gradually expanded based on

internal heuristics.

The integrated graphics engine has the frame buffer located in system memory. When

the display is updated, the graphics engine fetches display data from system memory.

Different screen resolutions and refresh rates have different memory latency

requirements. These requirements may limit the deepest Package C-state the

processor can enter. Other elements that may affect the deepest Package C-state

available are the following:
•

Display is on or off

•

Single or multiple displays

•

Native or non-native resolution

•

Panel Self Refresh (PSR) technology

Display resolution is not the only factor influencing the deepest Package C-state the

processor can get into. Device latencies, interrupt response latencies, and core C-

states are among other factors that influence the final package C-state the processor

can enter.

The following table lists display resolutions and deepest available package C-State.

The display resolutions are examples using common values for blanking and pixel

rate. Actual results will vary. The table shows the deepest possible Package C-state.

System workload, system idle, and AC or DC power also affect the deepest possible

Package C-state.

Mobile 4th Generation Intel

®

 Core

™

 Processor Family, Mobile Intel

®

 Pentium

®

 Processor Family, and Mobile Intel

®

 Celeron

®

Processor Family

July 2014

Datasheet – Volume 1 of 2

Order No.: 329001-007

51