Intel i7-4600U CL8064701477000 Data Sheet
Product codes
CL8064701477000
Table 46.
DDR3L / DDR3L-RS Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
V
IL
Input Low Voltage
—
V
DDQ
/2
0.43*V
DDQ
V
2, 4, 11
V
IH
Input High Voltage
0.57*V
DDQ
V
DDQ
/2
—
V
3, 11
V
IL
Input Low Voltage
(SM_DRAMPWROK)
—
—
0.15*V
DDQ
V
—
V
IH
Input High Voltage
(SM_DRAMPWROK)
0.45*V
DDQ
—
1.0
V
10, 12
R
ON_UP(DQ)
DDR3L/DDR3L-RS Data
Buffer pull-up
Resistance
20
26
32
Ω
5, 11
R
ON_DN(DQ)
DDR3L/DDR3L-RS Data
Buffer pull-down
Resistance
20
26
32
Ω
5, 11
R
ODT(DQ)
DDR3L/DDR3L-RS On-
die termination
equivalent resistance
for data signals
38
50
62
Ω
11
V
ODT(DC)
DDR3L/DDR3L-RS On-
die termination DC
working point (driver
set to receive mode)
0.45*V
DDQ
0.5*V
DDQ
0.55*V
DDQ
V
11
R
ON_UP(CK)
DDR3L/DDR3L-RS Clock
Buffer pull-up
Resistance
20
26
32
Ω
5, 11,
13
R
ON_DN(CK)
DDR3L/DDR3L-RS Clock
Buffer pull-down
Resistance
20
26
32
Ω
5, 11,
13
R
ON_UP(CMD)
DDR3L/DDR3L-RS
Command Buffer pull-
up Resistance
15
20
25
Ω
5, 11,
13
R
ON_DN(CMD)
DDR3L/DDR3L-RS
Command Buffer pull-
down Resistance
15
20
25
Ω
5, 11,
13
R
ON_UP(CTL)
DDR3L/DDR3L-RS
Control Buffer pull-up
Resistance
19
25
31
Ω
5, 11,
13
R
ON_DN(CTL)
DDR3L/DDR3L-RS
Control Buffer pull-down
Resistance
19
25
31
Ω
5, 11,
13
R
ON_UP(SM_PG_CNTL1)
System Memory Power
Gate Control Buffer
Pull-Up Resistance
40
80
130
Ω
13
R
ON_DN(SM_PG_CNTL1)
System Memory Power
Gate Control Buffer
Pull-Down Resistance
40
80
130
Ω
13
I
LI
Input Leakage Current
(DQ, CK)
0V
0.2*V
0V
0.2*V
DDQ
0.8*V
DDQ
—
—
0.7
mA
—
continued...
Processors—Electrical Specifications
Mobile 4th Generation Intel
®
Core
™
Processor Family, Mobile Intel
®
Pentium
®
Processor Family, and Mobile Intel
®
Celeron
®
Processor Family
Datasheet – Volume 1 of 2
July 2014
92
Order No.: 329001-007