Intel C2550 FH8065401488912 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

111

The SoC

 

contains a variable frequency, multiple clock domain, and a multiple power 

plain clocking system. The architecture includes a clock synchronization scheme, a 

multiple clock domain crossing, management of skew between the CPU and the rest of 

the system, and consolidation of PLLs. 

A clock synthesizer component can be used to provide the reference clocks to the SoC. 

The Customer Reference Board (CRB) designs associated with the SoC product use a 

clock synthesizer component marketed by Integrated Device Technology, Inc*.

The reference clocks must comply with the specifications given in 

. Some require Spread-Spectrum Clocking 

(SSC). The SoC reference-clock inputs are:

• 100 MHz differential, PCI Express* 2.0 Specification compliant, SSC required
• 100 MHz differential isolated for SATA 2, SSC required
• 100 MHz differential isolated for SATA 3, either SSC or non-SSC can be used
• 100 MHz differential, for memory controller 0, SSC required
• 100 MHz differential, for memory controller 1, SSC required
• 100 MHz differential, for host PLL, SSC required
• 100 MHz (or 125 MHz for 2.5 GbE) differential, for GbE controller, non-SSC
• 96 MHz differential, for USB controller, non-SSC
• 14.318 MHz single-ended, non-SSC