Intel C2550 FH8065401488912 Data Sheet

Product codes

FH8065401488912

Volume 2—System Address Maps—C2000 Product Family

Physical Address Space Map

Intel

Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

178

Order Number: 330061-002US

Table 10-3

shows the integrated PCI devices that claim memory resources in the MMIO

space. See each device functional description chapter for details.

Warning:

Variable memory ranges must be set to not conflict with other memory ranges.

Unpredictable results can happen if the configuration software allows conflicts to occur.

The SoC hardware does not check for conflicts.

Table 10-2. Other Fixed Memory Ranges

Device

Start Address

End Address

Comments

Low BIOS (Flash Boot)

000E_0000h

000F_FFFFh

Starts 128 KB below 1 MB; Firmware/BIOS

High BIOS/Boot Vector

FFFF_0000h

FFFF_FFFFh

Starts 64 KB below 4 GB; Firmware/BIOS

Table 10-3. Internal Devices with Variable MMIO Addresses (Sheet 1 of 2)

Range Name

Base Address

Register

Size Details

Comments

ECAM

Internal B-Unit:
BECREG

256 MB in 32-bit space

For accessing local PCIe* Extended

Configuration Space through MMIO

PCI Express* Port 1

D1:F0:
EXPPTMBAR

128 KB in 32- or 64-bit

space

Reserved

PCI Express Port 1

D1:F0:
MEMBASE and

MEMLIMIT

Variable in 32-bit space

Memory base and limit for PCI

Express* Root Port 1

PCI Express Port 1
(prefetchable)

D1:F0:
{PFBASEU, PFBASE}

and {PFLIMITU,

PFLIMIT}

Variable in 32- or 64-bit

space

Prefetchable memory base and limit

for PCI Express Root Port 1

PCI Express Port 2

D2:F0:
EXPPTMBAR

128 KB in 32- or 64-bit

space

Reserved

PCI Express Port 2

D2:F0:
MEMBASE and

MEMLIMIT

Variable in 32-bit space

Memory base and limit for PCI

Express Root Port 2

PCI Express Port 2
(prefetchable)

D2:F0:
{PFBASEU, PFBASE}

and {PFLIMITU,

PFLIMIT}

Variable in 32- or 64-bit

space

Prefetchable memory base and limit

for PCI Express Root Port 2

PCI Express Port 3

D3:F0:
EXPPTMBAR

128 KB in 32- or 64-bit

space

Reserved

PCI Express Port 3

D3:F0:
MEMBASE and

MEMLIMIT

Variable in 32-bit space

Memory base and limit for PCI

Express Root Port 3

PCI Express Port 3
(prefetchable)

D3:F0:
{PFBASEU, PFBASE}

and {PFLIMITU,

PFLIMIT}

Variable in 32- or 64-bit

space

Prefetchable memory base and limit

for PCI Express Root Port 3

PCI Express Port 4

D4:F0:
EXPPTMBAR

128 KB in 32- or 64-bit

space

Reserved

PCI Express Port 4

D4:F0:
MEMBASE and

MEMLIMIT

Variable in 32-bit space

Memory base and limit for PCI

Express Root Port 4

PCI Express Port 4

(prefetchable)

D4:F0:
{PFBASEU, PFBASE}

and {PFLIMITU,

PFLIMIT}

Variable in 32- or 64-bit

space

Prefetchable memory base and limit

for PCI Express Root Port 4