Intel C2550 FH8065401488912 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

207

The GbE controller provides two interfaces to connect to an external Baseboard 

Management Controller (BMC). The board design can use either the System 

Management Bus (SMBus) interface or the Network Controller Sideband Interface (NC-

SI). A SoC pin-based hard strap is used to designate which of the two interfaces is used 

in the platform board design. See 

SMBus 2.0 is an optional interface for pass-through and/or configuration traffic 

between an external BMC and the SoC integrated GbE controller. As an SMBus master, 

the GbE controller provides the SMBus clock at 84 kHz, nominal. As a target, it 

functions with an SMBus clock between 10 kHz and 100 kHz provided by the bus 

master. Electrical and timing specifications are in 

The SMBus channel behavior and the commands used to configure or read status from 

the SoC integrated GbE controller are outlined in the Intel

Product Family Integrated GbE Controller Programmer’s Reference Manual (PRM).

The SoC GbE interface also enables reporting and controlling the device using the 

Management Component Transport Protocol (MCTP) protocol over SMBus. The MCTP 

interface is used by the BMC to control only the interface, not for pass-through traffic. 

All network ports are mapped to a single MCTP endpoint on SMBus. For information, 

refer to the PRM.