Intel C2550 FH8065401488912 Data Sheet
Product codes
FH8065401488912
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
255
Volume 2—SATA Controllers (SATA2, SATA3)—C2000 Product Family
Staggered Spin-Up Support
13.3
Staggered Spin-Up Support
The staggered spin-up feature enables a controller to individually spin-up attached
devices. This mechanism is useful to avoid having a power supply that must handle a
maximum current draw from all devices and at the same time applying power to the
devices. In order for a system to support staggered spin-up, the SATA controller, the
BIOS, and the device driver must all support staggered spin-up.
Staggered spin-up supported in both legacy and AHCI modes, is controlled by the
software via sequencing of COMRESET signaling.
summarizes the operations
of SATA controller in legacy and AHCI modes. Refer to the AHCI Specification for more
details on AHCI staggered spin-up.
13.3.1
Staggered Spin-Up Operations in IDE Mode
When configured the controller in IDE mode (CC.SCC = 01h), the device driver or BIOS
has to cycle through PCS.PxE bits. COMRESET is sent for the ports whose PCS.PxE bit is
1. To ensure that the target device is ready and completely spun, the BIOS/device
driver is to check if BSY is cleared. The device driver/BIOS is to check for the PCS.PxP
bit (set to 1) to determine if the device is present. If the PCS.PxP bit is not set with 10
ms of setting the PCS.PxE bit, this indicates that no target device is connected to the
port.
13.3.2
Staggered Spin-Up Operation in AHCI Mode
The device driver/BIOS is to perform the following actions:
1. Program ABAR.
2. Configure the controller in the AHCI mode by setting the AHCI GHC.AE bit.
3. Set AHCI CAP.SSS to indicate a staggered spin-up support.
4. Set the PCS.PxE bits.
5. Set the PxCMD.SUD bits as this results in COMRESET to be issued to all the enabled
2. Configure the controller in the AHCI mode by setting the AHCI GHC.AE bit.
3. Set AHCI CAP.SSS to indicate a staggered spin-up support.
4. Set the PCS.PxE bits.
5. Set the PxCMD.SUD bits as this results in COMRESET to be issued to all the enabled
ports.
6. Poll PxSSTS.DET to obtain the status of the port.
Table 13-5. Operations Summary of SATA Controller in Legacy and AHCI Modes
MAP.SMS
PCS.PxE
GHC.AE
CAP.SSS
PxCMD.SUD
Result
00b
0
x
x
x
No COMRESET and no spin-up.
00b
1
x
x
x
COMRESET and spin-up.
01b/10b
0
x
x
x
No COMRESET and no spin-up.
01b/10b
1
1
0
0
This is not a valid combination. When CAP.SSS
is 0, PxCMD.SUD must be 1.
01b/10b
1
1
0
1
COMRESET and spin-up.
01b/10b
1
1
1
0
No COMRESET and no spin-up.
01b/10b
1
1
1
1
COMRESET and spin-up.