Intel C2550 FH8065401488912 Data Sheet

Product codes
FH8065401488912
Page of 746
Volume 2—SMBus 2.0 Unit 1 - Host—C2000 Product Family
Controller Characteristics and Operation
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
336
Order Number: 330061-002US
15.4.8.5.4
Normal Usage
Before programming new data into the GPBR buffer, the firmware sets both 
GPBRCTRL.BUFRST (which resets the buffer contents to 0) and GPBRCTRL.PTRRST 
(which resets the buffer pointer position). After the hardware has completed the reset, 
it clears both bits.
15.4.8.5.5
Debug Usage
To enable the firmware to readback (verify) the contents of the GPBR buffer, the 
firmware sets only GPBRCTRL.PTRRST, which resets the buffer pointer position but 
leave the buffer contents intact. Consecutive reads then return the previously written 
buffer data.
The hardware provides read data payload starting from bits [7:0] of Dword0 of the 
buffer, then bits [15:8] of Dword0, and so on. All bytes must be programmed in the 
sequence to be sent out without gaps. The hardware counts the number of bytes 
indicated in the GPBRCTRL.BC register and start sending them out sequentially starting 
at byte 0 of Dword 0 until the byte count is decremented to 0.