Intel C2550 FH8065401488912 Data Sheet
Product codes
FH8065401488912
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
375
Volume 2—Platform Controller Unit (PCU)—C2000 Product Family
Register Map
16.7.1
PCI Configuration and Capabilities
One PCU configuration register is located in the LPC Configuration registers at bus 0,
device 31 (decimal), function 0.
16.7.2
MMIO Registers
16.7.3
Alternate Register Access Map
The SoC maps a number of registers not exposed typically through PCI Configuration
Space by an alternate mechanism that maps the registers into MMIO. The following
areas are provided through this alternate access method.
Table 16-8. Register Map in LPC Configuration and Capabilities
CFG
Address
Offset
Name
Description
0xD8
BIOS Decode Enable
0xF0
Table 16-9. MMIO Register Map
MEM
Address
Name
Description
0x00
General Control Status (GCS)
Table 16-10. Alternate Access Map (Sheet 1 of 2)
Source
Destination
Description
BAR
Name
Space
Start
Address
End
Address
Block
Name
Space
Start
Address
End
Address
IOBASE
MMIO
0x00000
0x01000
CORE_IO
Private
CFG
0x04000
0x04FFF
CORE CFIO
Controller
memory space
IOBASE
MMIO
0x01000
0x017FF
SUS_IO
Private
CFG
0x04000
0x04FFF
Suspend CFIO
Controller
memory space
GBASE
I/O
0x00000
0x0007F
CORE_IO
Private
CFG
0x00000
0x0007F
CORE CFIO
Controller I/O
configurations
GBASE
I/O
0x00080
0x000BF
SUS_IO
Private
CFG
0x00000
0x0003F
Suspend CFIO
Controller I/O
configurations
RCBA
MMIO
0x00200
0x003FF
USB2
bridge
Private
CFG
0x00000
0x001FF
USB2 RCRB
registers
MPBASE
MMIO
0x00000
0x3FFFF
SATA PHY
MMIO
0x00000
0x3FFFF
SATA PHY memory
space
MPBASE
MMIO
0x40000
0x7FFFF
PCIe PHY
MMIO
0x00000
0x3FFFF
PCIe PHY memory
space