Intel C2550 FH8065401488912 Data Sheet

Product codes
FH8065401488912
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
509
Volume 2—Low Pin Count (LPC) Controller—C2000 Product Family
Register Map
24.5.1
PCI Configuration and Capabilities
Table 24-6. LPC Register Map - PCI Configuration Space
Configuration 
Address 
Offset
Name
Description
0x00
Identifiers Register
0x04
Command
0x06
Status
0x08
Revision ID and Class Code
0x0D
Master Latency Timer
0x0E
Header Type
0x2C
Subsystem ID and Vendor ID
0x34
Capability List Pointer. Points to offset 0xE0.
0x40
0x44
0x48
0x4C
0x50
0x54
0x58
0x5C
PUNIT_BASE_ADDRESS
PUNIT registers are mapped into 2048 bytes of 
memory space.
0x80
UART Control - A 32-bit register to enable/disable 
the UART.
0xD8
BIOS Decode Enable - A 16-bit register that 
enables ranges in the SPI- or LPC -attached BIOS 
for decoding purposes.
0xE0
0xE2
0xE3
0xE4
0xE8
0xF0