Intel C2550 FH8065401488912 Data Sheet

Product codes
FH8065401488912
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
565
Volume 2—I/O Advanced APIC (I/O APIC)—C2000 Product Family
Architectural Overview
30.3.3.3
Redirection Table Entry (RTE[23:0]) Registers
All 24 of the 64-bit Redirection Table Entry (RTE) Registers have the same format which 
is shown below. Each 64-bit register is accessed as two, 32-bit register accesses 
starting at offsets 10-11h (RTE[0]). The RTE[23] register is accessed at offsets 3E-3Fh.
Table 30-5. Redirection Table Entry (RTE[23:0]) Registers
Bits
Type
Reset
Description
63:56
RW
X
Destination ID (DID):
 Destination ID of the local APIC.
55:48
RW
X
Extended Destination ID (EDID): 
Extended destination ID of the local APIC.
47:17
RO
0
Reserved
16
RW
1
Mask (MSK):
 When set, interrupts are not delivered nor held pending. When 
cleared, and edge or level on this interrupt results in the delivery of the interrupt.
15
RW
X
Trigger Mode (TM):
 When cleared, the interrupt is edge sensitive. When set, the 
interrupt is level sensitive.
14
RW
X
Remote IRR (RIRR):
 This is used for level triggered interrupts its meaning is 
undefined for edge triggered interrupts. This bit is set when IOxAPIC sends the 
level interrupt message to the CPU. This bit is cleared when an EOI message is 
received that matches the VCT field. This bit is never set for SMI, NMI, INIT, or 
ExtINT delivery modes.
13
RW
X
Polarity (POL): 
This specifies the polarity of each interrupt input. When cleared, 
the signal is active high. When set, the signal is active low.
12
RO
X
Delivery Status (DS):
 This field contains the current status of the delivery of this 
interrupt. When set, an interrupt is pending and not yet delivered. When cleared, 
there is no activity for this entry.
11
RW
X
Destination Mode (DSM): 
This field is used by the local APIC to determine 
whether it is the destination of the message.
10:8
RW
X
Delivery Mode (DLM): 
This field specifies how the APICs listed in the destination 
field should act upon reception of this signal. Certain Delivery Modes only operate 
as intended when used in conjunction with a specific trigger mode. The encoding is:
000  Fixed
001  Lowest Priority
010  SMI – Not supported
011  Reserved
100  NMI – Not supported
101  INIT – Not supported
110  Reserved
111  ExtINT
7:0
RW
X
Vector (VCT):
 This field contains the interrupt vector for this interrupt. Values 
range between 10h and FEh.