Intel C2550 FH8065401488912 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 3 of 3

September 2014

646

Order Number: 330061-002US

While transmitting the test pattern specified in Annex 48A - Jitter Test Patterns of IEEE 

Standard 802.3*-2008,

1. The transmitter maximum differential peak-to-peak output voltage shall be less 

than 1200 mV.

2. The minimum differential peak-to-peak output voltage shall be greater than 800 

mV.

3. The maximum difference between any two lanes’ differential peak-to-peak output 

voltage shall be less than or equal to 150 mV.

See 

 for an illustration of the definition of differential peak-to-peak output 

voltage.

DC-referenced voltage levels are not defined since the receiver is AC-coupled. The 

common-mode voltage of SLn<p> and SLn<n> shall be between –0.4V and 1.9V with 

respect to signal ground as measured at V

com

SLn<p> and SLn<n> are the positive and negative sides of the differential signal pair 

for Lane n (n = 0,1,2,3).