Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

154

Order Number: 330061-002US

The power management features are:

• ACPI system power states supported: G0 (S0), G2 (S5), G3 (Mechanical Off) 

— G1 (S1, S2, S3, S4) are not supported.
— The SoC has some G1 capabilities, but must not be used. They are not 

supported by Intel.

• ACPI processor (CPU) C-states: C0, C1, C6C. The C4 state is not supported.
• ACPI device states: D0, D3
• PCI Express*: L0 and L1 Supported (L0s not supported).
• Enhanced Intel SpeedStep

®

 Technology functionality on CPU local bus

• Enhanced Intel SpeedStep

®

 Technology

• Hardware throttling
• Clock  gating
• Thermal throttling
• Dynamic I/O power reductions (disabling sense amps on input buffers, tri-stating 

output buffers)

• Re-programmable Power Management Unit (PMU)
• PECI  over  SMBus
• Running Average Power Limiter (RAPL)
• DDR3 SDRAM memory controller and PHY:

— Dynamic  rank  power  down.
— Dynamic power down is employed during normal operation. If all the pages 

have all been closed at the time of CKE pin deassertion, the SDRAM devices 

enter the pre-charge power-down state. Otherwise the devices enter the active 

power-down state.

— Conditional memory self-refresh.
— DLL master/slave shut down based on CPU state.
— Address and Command signal tri-state when all memory is in power down or 

self-refresh, or when not in use (no chip select asserted).

— Chip-select tri-state for a powered-down row.
— Clock tri-stating for unpopulated DIMMs.
— CKE/CS tri-stating for unpopulated rows.
— Conditional memory self-refresh during C6.
— Conditional and software-directed memory self-refresh.

Supports conditional self-refresh entry in the C6 state based on memory 

request traffic from the host interface agents.

• Debug and testability hooks