Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
167
Volume 2—Power Management—C2000 Product Family
Power Management Technologies
9.11
Power Management Technologies
9.11.1
Intel
®
 Turbo Boost Technology
Intel
®
 Turbo Boost Technology enables higher performance through the availability of 
increased core frequency under certain configurations and workloads. Turbo allows 
processor cores to run faster than the specified operating frequency if the processor is 
operating below rated power, temperature, and current specification limits of the 
system. Turbo is engaged with any number of cores or logical processors enabled and 
active, enabling increased performance of both multi- and single-threaded workloads.
The BIOS enables/disables turbo features. The power-on default value of 
IA32_MISC_ENABLES[38] indicates to the BIOS if the turbo features are present. A 
default value of 1 indicates that turbo features are present and disabled. The BIOS 
clears the IA32_MISC_ENABLES[38] to 0 to enable turbo. A reset-default value of 0 
indicates that turbo features are disabled and not available.
The Operating System (OS) and applications must use CPUID.06H:EAX[1] to detect 
whether the BIOS has enabled turbo features. If IA32_MISC_ENABLES[38] is set, 
CPUID.06H:EAX[1] returns 0.
Because IA32_MISC_ENABLES[38] is defined per-package, CPUID has to read from the 
uncore to get MISC_ENABLES[38]. The OS or BIOS manages read-modify-write 
conflicts cross-core. Setting IA32_MISC_ENABLES[38] on any core causes the SoC to 
disable turbo operation for ALL cores.
Certain software workloads may not be able to tolerate the non-deterministic aspects 
of turbo operation. The software temporarily disables turbo operation by setting 
CLOCK_CR_GEYSIII_CONTROL[32] bit of the IA32_PERF_CTL Model-Specific Register 
(MSR) [MSR 0199h]. As previously mentioned, disabling turbo on any core causes 
turbo to be disabled for ALL cores.
Configuration of certain turbo-power budget settings is accessible by the OS/driver 
software via SoC Sideband (SB) registers. PKG_TURBO_POWER_LIMIT configuration 
registers are duplicated in the SB register space for this purpose. The MSR copies of the 
registers are initialized by the BIOS to typical recommended settings and are 
overridden with more conservative values by the OS/driver by programming the 
corresponding SB registers. The SoC power management reads both copies of the 
registers and applying the more restrictive settings to the turbo algorithms.