Intel C2518 FH8065501516710 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

170

Order Number: 330061-002US

This chapter describes the four SoC address spaces. They are:

• Physical Address Space, also called the Memory Space
• I/O  Space
• PCI Configuration Space

The CPU core only directly accesses the memory space through memory reads and 

writes, and the I/O space through the IN and OUT instructions.

The PCI configuration space is indirectly accessed through the I/O space and the 

memory space.

The physical address space of 64 GB (36 bits) is used as:

• Memory-Mapped I/O (MMIO) for devices integrated in the SoC.
• DRAM memory implemented as DDR3 SDRAM devices on the platform board.

The CPU core accesses the all 64 GB of physical address space. Integrated devices 

access their own MMIO registers and DDR3 DRAM.

Besides accessing their MMIO registers and system DRAM, a PCI Express* Root Port 

(RP) is enabled to also access the address spaces allocated to the other PCIe* RPs and 

the devices integrated in the SoC, via a 64-bit address space compatible with PCIe. 

This is called a peer-to-peer transaction.