Intel C2518 FH8065501516710 Data Sheet
Product codes
FH8065501516710
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
411
Volume 2—SMBus 2.0 Unit 2 - PECI—C2000 Product Family
DRAM Thermal Capabilities
17.8.1
DRAM Rank Temperature Write (Index = 18)
. The DRAM Rank
Temperature Write allows the PECI host to program the processor with the temperature
for all the ranks within a DIMM up to a maximum of four ranks. The programming data
structure is defined in
.
The DIMM index and Channel index are specified through the Parameter field as shown
in
and
. This write is relevant to
platforms that do not have on-die or on-board DIMM thermal sensors to provide
memory temperature information or if the processor does not have direct access to the
DIMM thermal sensors. This temperature information is used by the processor in
conjunction with the activity-based DRAM temperature estimations. With this SoC
product family, while temperature values are accepted on a per-rank basis, the SoC
uses the average temperature over a given channel for throttling decisions.
17.8.2
DRAM Channel Temperature Read (Index = 22)
See
. This feature
enables a PECI host read of the maximum temperature of each Memory Controller
Channel of the given product SKU. This includes all of the DIMMs within the Channel
and all the Ranks within each of the DIMMs. See the returned data structure as shown
in
.
Note:
Memory Channels not populated by DRAM return:
• the Ambient Temperature on systems using activity-based temperature
estimations,
or alternatively,
• a zero for systems using sensor-based temperatures.
Figure 17-10.Write DRAM Rank Temperature Data DWord
Rank# 3
Absolute Temp
(°C)
Rank# 2
Absolute Temp
(°C)
Rank# 1
Absolute Temp
(°C)
Rank# 0
Absolute Temp
(°C)
31
24 23
16 15
8 7
0
Figure 17-11.Read DRAM Channel Temperature Data DWord
Reserved
Channel# 1
Maximum Temp
(°C)
Channel# 0
Maximum Temp
(°C)
31
24 23
16 15
8 7
0
Reserved