Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
443
Volume 2—SMBus 2.0 Unit 0 - PCU—C2000 Product Family
Register Map
18.5.2
Registers in Memory Space
The list of the PCU-SMBus 2.0 registers in the memory space is shown in 
This list of MMIO registers starts at the memory address designated by the 32-bit
 
register listed in 
register is not used and 
the MMIO must be in the 32-bit addressing space.
Table 18-9. PCU-SMBus 2.0 Registers in Memory Space
Memory 
Address 
Offset
Name
Description
0x00
Host Status Register
0x02
Host Control Register
0x03
Host Command Register
0x04
Transmit Slave Address Register
0x05
Data 0 Register
0x06
Data 1 Register
0x07
Host Block Data
0x08
Packet Error Check Data Register
0x09
Receive Slave Address Register
0x0C
Auxiliary Status
0x0D
Auxiliary Control
0x0E
SMLINK_PIN_CTL Register (not supported)
0x0F
SMBUS_PIN_CTL Register
0x10
Slave Status Register
0x11
Slave Command Register
0x14
Notify Device Address Register
0x16
Notify Data Low Byte Register
0x17
Notify Data High Byte Register