Intel C2518 FH8065501516710 Data Sheet

Product codes
FH8065501516710
Page of 746
Volume 2—Intel Legacy Block (iLB) Devices—C2000 Product Family
Features
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
468
Order Number: 330061-002US
21.2.2
Non-Maskable Interrupt (NMI)
Non-Maskable Interrupt (NMI) support is enabled by setting the NMI Enable (NMI_EN) 
bit, at I/O port 70h, bit 7, to 1b.
NMIs are generated by several sources as described in 
.
Table 21-2. NMI Sources
NMI Source
NMI Source 
Enabler/
Disabler
NMI Source 
Status 
Alternate Configuration
SERR# goes active.
Note:
An SERR# is only generated 
internally in the SoC.
NSC.SNE
NSC.SNS
IOCHK# goes active.
Note:
An IOCHK# is only generated as an 
SERIRQ# frame.
NSC.INE
NSC.INS
NMI is generated from the General Purpose 
I/O (GPIO).
Note: