Intel C2518 FH8065501516710 Data Sheet
Product codes
FH8065501516710
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
541
Volume 2—High Precision Event Timer (HPET)—C2000 Product Family
Architectural Overview
28.3
Architectural Overview
This function provides a set of timers that are used by the operating system.
Three timers are implemented as a single counter each with its own comparator and
value register. This counter increases monotonically. Each individual timer generates an
interrupt when the value in its value register matches the value in the main counter.
The registers associated with these timers are mapped to a memory space at fixed,
32-bit addresses of 0xFED00000 through 0xFED003FF. Some portions of this address
range are not used and are reserved.
28.3.1
Configuration Registers
Each timer is individually configured through memory addresses show in
28.3.2
Timer Comparator
Memory reads to the registers show in
return the current value of the
comparator. The default value for each timer is all 1s for the bits that are implemented.
• Timer 0 is 64-bits wide.
• Timers 1 and 2 are 32-bits wide.
• Timers 1 and 2 are 32-bits wide.
28.3.3
Interrupts
Table 28-2. Timer Configuration in Memory Space
Address in
Memory Space
Default Value
Name
Description
0xFED00100
00F0_0000_0000_0030h
Timer 0 Configuration and Capabilities
0xFED00120
00F0_0000_0000_0000h
Timer 1 Configuration and Capabilities
0xFED00140
00F0_0800_0000_0000h
Timer 2 Configuration and Capabilities
Table 28-3. Timer Comparator Values
Address in
Memory Space
Default Value
Name
Description
0xFED00108
FFFF_FFFFh
Lower Timer 0 Comparator Value
0xFED0010C
FFFF_FFFFh
Upper Timer 0 Comparator Value
0xFED00128
0000_0000_FFFF_FFFFh
Timer 1 Comparator Value
0xFED00148
0000_0000_FFFF_FFFFh
Timer 2 Comparator Value