Intel C2350 FH8065401488914 Data Sheet
Product codes
FH8065401488914
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
103
Volume 2—System Agent and Root Complex—C2000 Product Family
SoC Error Handling Summary
SMBus Errors
F0
Retry Error (RETRYERR): An
error due to SMT master
transaction exceeding
(non-collision) retry count as
specified in RPOLICY.RETRY
Uncorrectable
(Fatal)
SoC detects and logs the error.
FERR/NERR is logged in the Global
Fatal Error Log registers:
GFERRSTS
GFFERRSTS
GFNERRSTS
GFFERRTIME
GFFERRSTS
GFNERRSTS
GFFERRTIME
SATA2 Errors
H0
When a set event occurs to
configuration bits
SATAGC.URD=1, during
SATAGC.URRE=1 and
CMD.SEE=1 for controller 1.
Uncorrectable
(Fatal)
SoC detects and logs the error.
Error is logged in PCISTS and
Global Fatal Error Log registers:
PCISTS
GFERRSTS
GFFERRSTS
GFNERRSTS
GFFERRTIME
GFFERRSTS
GFNERRSTS
GFFERRTIME
H1
When a set event occurs to
configuration bits STS.DPE=1
during CMD.PEE=1 and
CMD.SEE=1 for controller 1.
H2
When a set event occurs to
configuration bits STS.STA=1
during CMD.SEE=1 for
controller 1.
SATA3 Errors
I0
When a set event occurs to
configuration bits
SATAGC.URD=1, during
SATAGC.URRE=1 and
CMD.SEE=1 for controller 1.
Uncorrectable
(Fatal)
SoC detects and logs the error.
Error is logged in PCISTS and
Global Fatal Error Log registers:
PCISTS
GFERRSTS
GFFERRSTS
GFNERRSTS
GFFERRTIME
GFFERRSTS
GFNERRSTS
GFFERRTIME
I1
When a set event occurs to
configuration bits STS.DPE=1
during CMD.PEE=1 and
CMD.SEE=1 for controller 1.
I2
When a set event occurs to
configuration bits STS.STA=1
during CMD.SEE=1 for
controller 1
Table 4-13. Summary of Default Error Logging and Responses (Sheet 5 of 6)
ID
Error
Error Type
(Default
Severity)
Transaction Response
Default Error Logging
1