Intel C2350 FH8065401488914 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

Datasheet, Vol. 2 of 3

September 2014

196

Order Number: 330061-002US

Each of the four functions has three Base Address Registers (BARs) that are assigned 

address values during PCI bus enumeration. See 

.

There are two device-specific registers located in configuration space for each function. 

They provide one of the two possible methods for accessing the GbE controller’s 

internal command and status registers. This first method uses PCI configuration space 

of each of the four functions:

• 98h - IOADDR (32 bits)
• 9Ch - IODATA (32 bits)

This access through configuration space is not available if the function is assigned the 

Dummy Function device ID.

The other method uses the system’s I/O space. Once the BASE_ADDR_2 BAR is 

enumerated for a particular function, it can be used to access the IOADDR and IODATA 

registers:

• BASE_ADDR_2 (I/O base address) plus 0 - IOADDR (32 bits)
• BASE_ADDR_2 (I/O base address) plus 4 - IODATA (32 bits)

There are many configuration options that affect the parameter assignments and 

operation of the integrated GbE controller. This document only provides an overview 

and does not show all possibilities available to the SoC customer. For detailed 

descriptions, see the Intel

Controller Programmer’s Reference Manual (PRM).

10

BASE_ADDR_0

64-bit BAR for Memory Space for Memory-Mapped 

I/Os (MMIOs)

128 K

14

BASE_ADDR_1

18

BASE_ADDR_2

32-bit BAR for I/O Space (for access to the GbE 

controller’s internal command and status registers)

32

1C

BASE_ADDR_3

20

BASE_ADDR_4

64-bit BAR for Memory Space for Message Signaled 

Interrupts, extended (MSI-X)

16 K

24

BASE_ADDR_5