Intel C2350 FH8065401488914 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 2 of 3

Order Number: 330061-002US

315

When the firmware driver has to initiate a transaction on SMBus, and the descriptor 

ring buffer is not full, the following steps are performed:

1. The firmware programs a 16B descriptor with the attributes of the transaction in 

memory.

2. The firmware increments the FWmHeadPtr register.
3. The firmware then sets the Start bit (MCTRL.SS) in the hardware.
4. The hardware continuously checks if a descriptor needs to be processed by 

checking (FWmHeadPtr != HWmTailPtr):
a. Buffer empty condition: MSTS.HMTP = MCTRL.FMHP.
b. Buffer full: MCTRL.FMHP = MSTS.HMTP-1 or MCTRL.FMHP-MSTS.HMTP = MDS.
c. Buffer wrap condition: When MSTS.HMTP = MDS, and MCTRL.FMHP has already 

wrapped around, i.e., >= 00h, the hardware reads the 16B descriptor, process 

it and if criteria to increment pointer are met, it wraps to 00h.

5. If a descriptor (see 

) is available, the hardware first sets the InProgress 

bit (MSTS.IP), and then reads 16B descriptor from memory by combining (MD Base 

+ HWmTailPtr) from which it:
a. Decodes the Control Dword for transaction type and other attributes.
b. Loads the Write Data and Read Data pointers as required.
c. For writes, the hardware fetches data from the memory pointed to by the DPTR 

and transmits on wire. For reads, the hardware stores the DPTR pointer so it can 

Direct Memory Access (DMA) the data to that address when data is provided by 

the target.

6. Once the transaction is completed, the hardware does a status write back to the 

Status WB Dword.

7. The hardware then increments HWmTailPtr and send interrupt to the firmware if 

enabled to do so.
a. Before issuing the MSI, the hardware denotes the master completion in SMTICL 

and any error status.

8. The hardware then clears the InProgress bit to indicate it has completed processing 

of a descriptor.

9. The hardware then checks if the Start bit is set. If so, flow follows from #4, else 

from #1.