Intel C2350 FH8065401488914 Data Sheet

Product codes
FH8065401488914
Page of 746
Volume 2—Platform Controller Unit (PCU)—C2000 Product Family
Pin-Based (Hard) Straps
Intel
®
 Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
358
Order Number: 330061-002US
Notes:
1.
Once the pin-strap sampling period is over, the pin is configured with its normal functional 
characteristics.
2.
Once the pin-strap sampling period is over, if the NCSI_ARB_OUT strap pin is sampled as a low, the pin 
is configured as an input, GPIO_SUS1. If the NCSI_ARB_OUT strap pin is sampled as a high, the pin is 
configured as an input, NCSI_RXD0.
3.
Once the pin-strap sampling period is over, this pin becomes an output, NCSI_RXD1, regardless how 
NCSI_ARB_OUT was sampled.
4.
Once the pin-strap sampling period is over, if the NCSI_ARB_OUT strap pin is sampled as a low, the pin 
is configured as an output, Y59_RSVD. If the NCSI_ARB_OUT strap pin is sampled as a high, the pin is 
configured as an input, NCSI_ARB_OUT.
AC58
Reserved for Intel.
Must be logic low during sampling.
SUS Power OK
20 kΩ
Pull-down
1
V63
Note:
This pin is temporarily pulled-up internally 
during the sample period.
When the integrated Ethernet controller is powered-on 
during S5, the Wake-on-LAN and other LAN 
management capabilities can be utilized.
SUS Power OK
20 kΩ
Pull-up
3
Y59
When sampled low, this indicates the GBE_SMBus is 
used in the platform board design for management.
When sampled high, this indicates the NC-SI is to be 
used for management.
Note:
This pin is temporarily pulled-down internally 
during the sample period.
SUS Power OK
20 kΩ
Pull-down
4
Table 16-1. Hard Pin Straps (Sheet 2 of 2)
Signal Ball/Pin 
Name
Ball 
Location 
on SoC 
Package
Strap Usage
Sampled by 
This Reset
Internal 
PU/PD 
When 
Sampled
Notes