Intel C2350 FH8065401488914 Data Sheet
Product codes
FH8065401488914
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
363
Volume 2—Platform Controller Unit (PCU)—C2000 Product Family
Soft Straps
0
+ 0h
8
GbE ALL
Disable
All GbE Ports Disabled:
1'b0 (false) - Enabled
1'b1 (true) - Disabled
1'b0 (false) - Enabled
1'b1 (true) - Disabled
Setting this bit overrides individual GbE port disable bits.
1'b0
0
+ 0h
9
SATA 2
Disable
SATA 2 (B0:D23) Disable:
1'b0 (false) - Enabled
1'b1 (true) - Disabled
1'b0 (false) - Enabled
1'b1 (true) - Disabled
Note:
Ensure these soft straps are set to match this selection.
• SoC Strap 6 SATA 2 Power Enable Lane 0
• SoC Strap 6 SATA 2 Power Enable Lane 1
• SoC Strap 6 SATA 2 Power Enable Lane 2
• SoC Strap 6 SATA 2 Power Enable Lane 3
• SoC Strap 6 SATA 2 Power Enable
• SoC Strap 6 SATA 2 Power Enable Lane 1
• SoC Strap 6 SATA 2 Power Enable Lane 2
• SoC Strap 6 SATA 2 Power Enable Lane 3
• SoC Strap 6 SATA 2 Power Enable
1'b0
0
+ 0h
11:10
Reserved
Reserved
2'b00
0
+ 0h
12
PCIe RP1
Disable
PCIe* Root Port 1 (B0:D1) Disabled:
1'b0 (false) - Enabled
1'b1 (true) - Disabled
1'b0 (false) - Enabled
1'b1 (true) - Disabled
Note:
Ensure these soft straps are set to match this selection.
• SoC Strap 5 PCIe Lane Power Enable 0
• SoC Strap 5 PCIe Lane Power Enable 1
• SoC Strap 5 PCIe Lane Power Enable 2
• SoC Strap 5 PCIe Lane Power Enable 3
• SoC Strap 5 PCIe Lane Power Enable 1
• SoC Strap 5 PCIe Lane Power Enable 2
• SoC Strap 5 PCIe Lane Power Enable 3
• SoC Strap 8 PCIe RP1 (B0:D1) Disable
1'b0
0
+ 0h
13
PCIe RP2
Disable
PCIe Root Port 2 (B0:D2) Disabled:
1'b0 (false) - Enabled
1'b1 (true) - Disabled
1'b0 (false) - Enabled
1'b1 (true) - Disabled
Note:
If PCIe Root Port 2 is disabled, PCIe Root Port 1 must
be disabled as well.
Note:
Ensure these soft straps are set to match this selection.
• SoC Strap 5 PCIe Lane Power Enable 0
• SoC Strap 5 PCIe Lane Power Enable 1
• SoC Strap 5 PCIe Lane Power Enable 2
• SoC Strap 5 PCIe Lane Power Enable 3
• SoC Strap 5 PCIe Lane Power Enable 4
• SoC Strap 5 PCIe Lane Power Enable 5
• SoC Strap 5 PCIe Lane Power Enable 6
• SoC Strap 5 PCIe Lane Power Enable 7
• SoC Strap 5 PCIe Lane Power Enable 1
• SoC Strap 5 PCIe Lane Power Enable 2
• SoC Strap 5 PCIe Lane Power Enable 3
• SoC Strap 5 PCIe Lane Power Enable 4
• SoC Strap 5 PCIe Lane Power Enable 5
• SoC Strap 5 PCIe Lane Power Enable 6
• SoC Strap 5 PCIe Lane Power Enable 7
• SoC Strap 8 PCIe RP2 (B0:D2) Disable
1'b0
Table 16-5. Flash Descriptor Soft Strap (Sheet 2 of 10)
FITC
SoC
Strap
Number
FISBA
+
Offset
Bit
Offset
Soft Strap Name
Description
Default