Intel C2350 FH8065401488914 Data Sheet

Intel

®

 Atom™ Processor C2000 Product Family for Microserver

September 2014

Datasheet, Vol. 1 of 3

Order Number: 330061-002US

41

OOB

Out of Band

Overshoot

The maximum voltage observed for a signal at the device pad, measured with respect to V

CC.

Pad

The electrical contact point of a semiconductor die to the package substrate. A pad is only 

observable in simulations.

PCI, PCIe*

Peripheral Component Interconnect (Express). In this document, this interconnect refers to the PCI 

logical layer used by the IOSF protocol.

PCI Express*

PCI Express Generation 2

PCODE

Power Management Unit Micro-code

PCS

Physical Coding Sub layer

PEC

Packet Error Code

PECI

Platform Environmental Control Interface

PHY

Physical Layer Device

Pin

The contact point of a component package to the traces on a substrate, such as the motherboard. 

Signal quality and timings are measured at the pin.

PLC

Platform LAN Connect

PMA

Physical Medium Attachment

PMC

Power Management Controller

PMD

Physical Medium Dependent

PMU

Power Management Unit

Power-Good

Power-Good, or PWRGOOD (an active high signal) indicates that all the system power supplies and 

clocks are stable. PWRGOOD does go active a predetermined time after system voltages are stable 

and does go inactive as soon as any of these voltages fail their specifications.

Processor

The 64-bit, single-core or multi-core component (package)

Processor Core

The term Processor Core refers to the silicon die itself which contains multiple execution cores. Each 

execution core has an instruction cache, data cache, and shares its 1-MB L2 cache with a sibling 

execution core.

PXE

Preboot Execution Environment

Rank

A unit of DRAM corresponding four to eight devices in parallel, ignoring ECC. These devices are 

usually, but not always, mounted on a single side of a DDR3 DIMM.

Ringback

The voltage to which a signal changes after reaching its maximum absolute value. Ringback is 

caused by reflections, driver oscillations, or other transmission line phenomena.

RMII

Reduced Media Independent Interface (Reduced MII)

RP

Root Port

RTC

Real Time Clock

SA

Source Address

SATA

Serial ATA

SDP

Software Defined Pins

SerDes

Serializer/Deserializer. A transceiver that converts parallel data to serial data and vice-versa.

SFD

Start Frame Delimiter

SGMII

Serialized Gigabit Media Independent Interface

SMBus

System Management Bus. A two-wire interface through which simple system and power 

management related devices communicate with the rest of the system. A bus carrying various 

manageability components, including the LAN controller, BIOS, sensors, and remote-control devices. 

SMBus is based on the operational principles of the I

2

C* two-wire serial bus from Philips 

Semiconductor*. SMBus supports Alert signals for GbE and SMB_0 ports.

So-DIMM

Small outline Dual In-line Memory Module