Intel C2350 FH8065401488914 Data Sheet
Product codes
FH8065401488914
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
501
Volume 2—Low Pin Count (LPC) Controller—C2000 Product Family
Signal Descriptions
Table 24-3. LPC Host Signals and the SoC LPC Interface
LPC
Specification
Signal Name
LPC
Peripheral
Device
Direction
LPC Specification
Rev. 1.1 Description
SoC Signal Name
(LPC Host)
SoC Direction
(LPC Host)
LAD[3:0]
I/O
Multiplexed Command,
Address, and Data
I/O
LFRAME#
I
Frame: indicates start of a
new cycle and termination
of a broken cycle.
O
LCLK
I
Clock: same 33-MHz clock
as the PCI clock on the
host.
LPC_CLKOUT1
Two 25-MHz clock drivers
Two 25-MHz clock drivers
(not 33 MHz) are provided
to accommodate the
multi-device signal loading.
O
This clock is also
used internally by
the SoC LPC host.
CLKRUN#
OD
Clock Run: same as PCI
CLKRUN#. Only needed
by the peripherals that
need DMA or bus
mastering in a system
that stops the PCI bus
(generally in mobile
systems).
I/OD
SERIRQ
I/O
Serialized IRQ: only
needed by the peripherals
that need interrupt
support. This signal is
required for the host if it
does not contain the ISA
IRQ lines as inputs.
ILB_SERIRQ
This signal is also available
This signal is also available
to other platform devices
to generate serial
interrupts to the integrated
8259 PIC.
I/O
LSMI#
OD
SMI#: only needed if a
peripheral wants to cause
an SMI# on an I/O
instruction for retry.
Otherwise, use an SMI#
via SERIRQ. This signal is
optional for the host.
This is connected to any of
the SMI-capable GPIO
signals of the SoC.
I
LPCPD#
I
Power Down: this
indicates that the
peripheral prepares for
power to be removed from
the LPC I/F devices.
Actual power removal is
system dependent. This
signal is optional for the
host.
O
LRESET#
I
Reset: same as PCI reset
on the host.
O
LDRQ#
O
Encoded DMA/Bus Master
Request: only needed by
the peripherals that need
DMA or bus mastering.
This is an optional host
signal that is not supported
by the SoC.
Not applicable
LPME#
OD
LPC Power Management
Event: similar to PCI
PME#. Used by the
peripherals to request
wake-up from a
low-power state.
This is an optional host
signal that is not supported
by the SoC.
Not applicable